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Attached find a patch to convert sgimips  to timecounter.  The IP12
(mips1) does not get an accurate microtime, but it never had one
before.  MIPS3 systems use the common MIPS3 cp0 based code, centralizing
some of the logic.

Please feel free to test and review.  Thanks.

-- 
Garrett D'Amore, Principal Software Engineer
Tadpole Computer / Computing Technologies Division,
General Dynamics C4 Systems
http://www.tadpolecomputer.com/
Phone: 951 325-2134  Fax: 951 325-2191


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Index: sys/arch/sgimips/conf/files.sgimips
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/conf/files.sgimips,v
retrieving revision 1.40
diff -d -p -u -r1.40 files.sgimips
--- sys/arch/sgimips/conf/files.sgimips	11 Dec 2005 12:18:52 -0000	1.40
+++ sys/arch/sgimips/conf/files.sgimips	16 Sep 2006 02:25:42 -0000
@@ -27,6 +27,8 @@ file arch/sgimips/sgimips/disksubr.c
 file arch/sgimips/sgimips/machdep.c
 
 file arch/mips/mips/softintr.c
+file arch/mips/mips/mips3_clock.c	mips3
+file arch/mips/mips/mips3_clockintr.c	mips3
 
 file dev/md_root.c			memory_disk_hooks
 
Index: sys/arch/sgimips/include/types.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/include/types.h,v
retrieving revision 1.10
diff -d -p -u -r1.10 types.h
--- sys/arch/sgimips/include/types.h	5 Sep 2006 01:38:59 -0000	1.10
+++ sys/arch/sgimips/include/types.h	16 Sep 2006 02:25:42 -0000
@@ -5,6 +5,7 @@
 #define	__HAVE_DEVICE_REGISTER
 #define	__HAVE_GENERIC_SOFT_INTERRUPTS
 #define	__HAVE_GENERIC_TODR
+#define	__HAVE_TIMECOUNTER
 
 /* MIPS specific options */
 #define	__HAVE_BOOTINFO_H
Index: sys/arch/sgimips/sgimips/clock.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/sgimips/clock.c,v
retrieving revision 1.17
diff -d -p -u -r1.17 clock.c
--- sys/arch/sgimips/sgimips/clock.c	5 Sep 2006 01:38:59 -0000	1.17
+++ sys/arch/sgimips/sgimips/clock.c	16 Sep 2006 02:25:42 -0000
@@ -88,6 +88,7 @@ __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.
 #include <machine/sysconf.h>
 
 #include <mips/locore.h>
+#include <mips/mips3_clock.h>
 #include <dev/clock_subr.h>
 #include <dev/ic/i8253reg.h>
 
@@ -96,12 +97,9 @@ __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.
 
 u_int32_t next_clk_intr;
 u_int32_t missed_clk_intrs;
-unsigned long last_clk_intr;
 
 void mips1_clock_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
 void mips3_clock_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
-unsigned long mips1_clkread(void);
-unsigned long mips3_clkread(void);
 
 /*
  * Machine-dependent clock routines.
@@ -129,20 +127,7 @@ cpu_initclocks()
 
 #if defined(MIPS3)
 	if (mach_type != MACH_SGI_IP12) {
-		next_clk_intr = mips3_cp0_count_read()
-		    + curcpu()->ci_cycles_per_hz;
-		mips3_cp0_compare_write(next_clk_intr);
-
-		/* number of microseconds between interrupts */
-		tick = 1000000 / hz;
-		tickfix = 1000000 - (hz * tick);
-		if (tickfix) {
-			int ftp;
-
-			ftp = min(ffs(tickfix), ffs(hz));
-			tickfix >>= (ftp - 1);
-			tickfixinterval = hz >> (ftp - 1);
-		}
+		mips3_initclocks();
 	}
 #endif /* MIPS3 */
 }
@@ -166,51 +151,16 @@ mips1_clock_intr(u_int32_t status, u_int
 	}
 }
 
-unsigned long
-mips1_clkread()
-{
-
-	return 0;
-}
-
 #if defined(MIPS3)
 void
 mips3_clock_intr(u_int32_t status, u_int32_t cause, u_int32_t pc,
 		 u_int32_t ipending)
 {
-        u_int32_t newcnt;
 	struct clockframe cf;
 
-	last_clk_intr = mips3_cp0_count_read();
-
-	next_clk_intr += curcpu()->ci_cycles_per_hz;
-	mips3_cp0_compare_write(next_clk_intr);
-	newcnt = mips3_cp0_count_read();
-
-	/*
-	 * Missed one or more clock interrupts, so let's start
-	 * counting again from the current value.
-	 */
-	if ((next_clk_intr - newcnt) & 0x80000000) {
-		missed_clk_intrs++;
-
-		next_clk_intr = newcnt + curcpu()->ci_cycles_per_hz;
-		mips3_cp0_compare_write(next_clk_intr);
-	}
-
 	cf.pc = pc;
 	cf.sr = status;
-
-	hardclock(&cf);
+	mips3_clockintr(&cf);
 }
 
-unsigned long
-mips3_clkread()
-{
-	uint32_t res, count;
-
-	count = mips3_cp0_count_read() - last_clk_intr;
-	MIPS_COUNT_TO_MHZ(curcpu(), count, res);
-	return (res);
-}
 #endif /* MIPS3 */
Index: sys/arch/sgimips/sgimips/machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/sgimips/machdep.c,v
retrieving revision 1.97
diff -d -p -u -r1.97 machdep.c
--- sys/arch/sgimips/sgimips/machdep.c	1 Sep 2006 05:43:23 -0000	1.97
+++ sys/arch/sgimips/sgimips/machdep.c	16 Sep 2006 02:25:43 -0000
@@ -142,12 +142,10 @@ extern void	ip22_sdcache_enable(void);
 
 #if defined(MIPS1)
 extern void mips1_clock_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
-extern unsigned long mips1_clkread(void);
 #endif
 
 #if defined(MIPS3)
 extern void mips3_clock_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
-extern unsigned long mips3_clkread(void);
 #endif
 
 void	mach_init(int, char **, int, struct btinfo_common *);
@@ -415,7 +413,6 @@ mach_init(int argc, char **argv, int mag
 		splmasks[IPL_TTY] = 0x1b00;
 		splmasks[IPL_CLOCK] = 0x7f00;
 		platform.intr3 = mips1_clock_intr;
-		platform.clkread = mips1_clkread;
 		break;
 #endif /* MIPS1 */
 
@@ -429,7 +426,6 @@ mach_init(int argc, char **argv, int mag
 		splmasks[IPL_TTY] = 0x0f00;
 		splmasks[IPL_CLOCK] = 0xbf00;
 		platform.intr5 = mips3_clock_intr;
-		platform.clkread = mips3_clkread;
 		break;
 	case MACH_SGI_IP22:
 		splmasks[IPL_BIO] = 0x0700;
@@ -437,7 +433,6 @@ mach_init(int argc, char **argv, int mag
 		splmasks[IPL_TTY] = 0x0f00;
 		splmasks[IPL_CLOCK] = 0xbf00;
 		platform.intr5 = mips3_clock_intr;
-		platform.clkread = mips3_clkread;
 		break;
 	case MACH_SGI_IP30:
 		splmasks[IPL_BIO] = 0x0700;
@@ -445,7 +440,6 @@ mach_init(int argc, char **argv, int mag
 		splmasks[IPL_TTY] = 0x0700;
 		splmasks[IPL_CLOCK] = 0x8700;
 		platform.intr5 = mips3_clock_intr;
-		platform.clkread = mips3_clkread;
 		break;
 	case MACH_SGI_IP32:
 		splmasks[IPL_BIO] = 0x0700;
@@ -453,7 +447,6 @@ mach_init(int argc, char **argv, int mag
 		splmasks[IPL_TTY] = 0x0700;
 		splmasks[IPL_CLOCK] = 0x8700;
 		platform.intr5 = mips3_clock_intr;
-		platform.clkread = mips3_clkread;
 		break;
 #endif /* MIPS3 */
 	default:
@@ -731,29 +724,6 @@ haltsys:
 	for (;;);
 }
 
-void
-microtime(struct timeval *tvp)
-{
-	int s = splclock();
-	static struct timeval lasttime;
-
-	*tvp = time;
-	tvp->tv_usec += (*platform.clkread)();
-
-	/*
-	 * Make sure that the time returned is always greater
-	 * than that returned by the previous call.
-	 */
-	if (tvp->tv_sec == lasttime.tv_sec &&
-	    tvp->tv_usec <= lasttime.tv_usec &&
-	    (tvp->tv_usec = lasttime.tv_usec + 1) > 1000000) {
-		tvp->tv_sec++;
-		tvp->tv_usec -= 1000000;
-	}
-	lasttime = *tvp;
-	splx(s);
-}
-
 void delay(unsigned long n)
 {
 	register int __N = curcpu()->ci_divisor_delay * n;

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