(Pavel, your MTA bounces my email)

On Thu, Oct 20, 2005 at 10:34:04PM +0200, pcah8322@artax.karlin.mff.cuni.cz wrote:

> Can you put the non-working GENERIC kernel somewhere? I would test it on the
> same machine where the Tsutsui-san's original cache enabled kernel worked.

I'd expect Martin's kernel to work on your machine.  Tsutsui-san's code is:

@@ -862,6 +862,8 @@
 #if defined(MIPS3)
        case MIPS_R5000:
        case MIPS_RM5200: 
+               if (mach_type == MACH_SGI_IP32)
+                       r5k_enable_sdcache();
                break;
 #endif
        }

... and the code I committed was:

@@ -862,6 +862,7 @@
 #if defined(MIPS3)
        case MIPS_R5000:
        case MIPS_RM5200:
+               r5k_enable_sdcache();
                break;
 #endif
        }

... which, of course, is functionally identical for IP32.

Martin, what is the output of hinv on that machine?  I'm thinking one of the
following is true:

* your machine does not have SC,
* your machine does not have working SC,
* your machine has a weird r5ksc variant,
* our cache detection logic is completely hosed.
-- 

-- Chris
	GPG key FEB9DE7F (91AF 4534 4529 4BCC 31A5  938E 023E EEFB FEB9 DE7F)