In article <20041215133810.E6EB92356B@thoreau.thistledown.com.au>
simonb@wasabisystems.com wrote:

> So we want the reverse of the above - add a CPU_MIPS_VCE flag for R4000
> and R4400.  Is it the case that the R10000 doesn't need any L2 and still
> handles cache aliases properly (and so we'd need a separate flag for the
> R10000)?

According to nisimura-san, L2 cache is mandatory for R10000.
(i.e. all R10000 systems have L2 cache)

Maybe we should try some benchmark to see if the CPU_MIPS_VCE (or so)
flag makes some performance benefits.

IIRC, it was a bit faster to flush cache pmap_{copy,zero}_page()
implicitly and remove cache flush from cpu_lwp_fork().
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp