Hi, thank you for your explanation.

In article <20030928064500.GA9966@rezrov.net>
wileyc@rezrov.net wrote:

> > - R10000 cache
> >    I don't know if this code is right (I'm not a mips guy), but
> >    it's "better than nothing" and harmless anyway?
> >    (Um, I should try it on my R10000 O2...)
> 
> It does the right thing on my r10k O2 and doesn't seem to break anything.

I see, but I'll punt it other mips guys (or you).

> > - R5000sc stuff
> > - MI mips pmap (needs to be reviewed?)
 :
> Neither one of these is ready to be committed.  They're admittedly very
> ugly ... Rafal was going to look at these when he had a chance.

Ok.

> > - ahc diff
> >   "#if !defined(sgimips)" in MI drivers would not be acceptable.
> >    Is this really required only on sgimips?
 :
> Look at ahc_pci.c around line 1044, you'll see what I mean.  Without some
> mechanism of forcing scsiseq to remain zero, you'll end up with async/8
> transfers.

Hmm, then it should be at least something like #ifdef BROKEN_EEPROM
rather than ifdef sgimips. (Maybe we should consult Frank.)

> There's precedent for this sort of #ifdef -- if_rtk_pci.c, for example, has
> a similar bit around line 85.

I know the "hack", but it's really ugly and marked "XXX"
so you should not refer it 8-)

> (things that can be committed now without breaking other platforms)
> * arch/sgimips (in toto) and the cosmetic arch/mips,
> * distrib and etc (for sysinst and devices, respectively)

I'll handle some of these part first. Thanks!
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp