Steve Rumble rumble@steelfox.cataclysmic.org said;

> The machines under IP17, if I recall correctly, are not ARCS, and thus in order
> to get certain configuration parameters (especially the ethernet mac address) support
> for the NVRAM would need to be written. That is essentially where I left off. The 
> ARCS issue necessitates a fair bit of additional code in machdep.c. The lack of 
> ARCS also means pulling memory configuration from the PIC

I believe in that SGI chose a particular model of OEM reference design (VME board)
sold by MIPS Computer system to abandon and switch away from their aging m68k
product lines.  This means so-called SGI's "pre-ARCS" PROM was nearly identical
to the MIPS Computer system's own product.   Early releases of IRIX were
nothing more than UMIPS from MIPS Co. and in fact RISC/os (renamed from
UMIPS) kept a range of system call entries marked "reserved for SGI IRIS."
3K SGI port should be par or identical to mipsco/ in many sense.

Memory size detection logic can be found at mipsco/machdep.c, which is known
working on R3K system.

Toru Nishimura/ALKYL Technology