Subject: Re: Info on Indy/Indigo2 caches?
To: Jeffrey M. Smith <jeffs@atheros.com>
From: Rafal Boni <rafal.boni@eDial.com>
List: port-sgimips
Date: 04/26/2001 14:29:07
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In message <3AE868CB.B8CA8194@atheros.com>, you write: 

- -> > Or is this all only true for R4600 and R5000 parts?  (I've got a R4400SC).
- -> 
- -> I think this is the only the QED (R4600 and R5000) parts.  The R4400SC
- -> should act a lot like the pmax R4[04]00SC and use the cache ops defined
- -> in the R4000 spec.

Ah, so that explains the cache issues I was having as you correctly pointed
out the other day.  I assumed the SysAD cache and the R4400SC were one and
the same thing.  I've now hardcoded in the L2 cache size (and hence got the
generic MIPS cache logic to flush the L2 cache) and seem to work much better.

- -> It's not like it's documented anywhere.

Heh, that was the conclusion I came to looking for this stuff on the web.

Thanks, again!
- --rafal

- ----
Rafal Boni                                              rafal.boni@eDial.com
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-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.0.0 (GNU/Linux)
Comment: Exmh version 2.1.1 10/15/1999

iD8DBQE66GjzEeBxM8fTAkwRAtmwAJ99LP8N05mBo/AhqpqjdL5vLYIHNACfTRZQ
BVEHIH2mXEsJHVR2cGPJod4=
=Z9Ks
-----END PGP SIGNATURE-----