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Workaround for IBM405 Errata 77 (CPU_210)



I implemented workaround for IBM405 Errata 77 (aka CPU_210),

    http://www.netbsd.org/~rin/ibm405_errata77_20200221.patch

where interrupted stwcx. may errantly write data to memory:

    https://elinux.org/images/1/1d/Ppc405gp-errata.pdf

This is because stwcx. is broken to two pieces in the pipeline (OMG!).

We need to
(1) insert dcbt before every stwcx. instruction, as well as
(2) insert sync before every rfi/rfci instruction.

From document above, it is unknown which processors are affected, but
according to Linux, all 405-based cores up until 405GPR and 405EP are
affected:

    https://github.com/torvalds/linux/blob/master/arch/powerpc/platforms/40x/Kconfig#L140

For main kernel, this workaround can be enabled only for affected
processors. However, for kernel modules and userland, we should enable
for all 32bit powerpc archs if we keep binary compatibility, like this:

--- sys/arch/powerpc/include/asm.h      12 Jan 2015 02:32:33 -0000      1.48
+++ sys/arch/powerpc/include/asm.h      21 Feb 2020 00:43:16 -0000
@@ -432,4 +432,20 @@ y: .quad   .##y,.TOC.@tocbase,0;   \
 .endm
 #endif /* _LOCORE */

+#if defined(IBM405_ERRATA77) || \
+    ((defined(_MODULE) || !defined(_KERNEL)) && !defined(__LP64__))
+/*
+ * Workaround for IBM405 Errata 77 (CPU_210): interrupted stwcx. may
+ * errantly write data to memory
+ *
+ * (1) Insert dcbt before every stwcx. instruction
+ * (2) Insert sync before every rfi/rfci instruction
+ */
+#define        IBM405_ERRATA77_DCBT(ra, rb)    dcbt ra,rb
+#define        IBM405_ERRATA77_SYNC            sync
+#else
+#define        IBM405_ERRATA77_DCBT(ra, rb)    /* nothing */
+#define        IBM405_ERRATA77_SYNC            /* nothing */
+#endif
+
 #endif /* !_PPC_ASM_H_ */

Can I commit this? Any comments or objections?

Thanks,
rin


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