Subject: Build fix after recent gcc update
To: None <port-powerpc@NetBSD.org>
From: Havard Eidnes <he@NetBSD.org>
List: port-powerpc
Date: 10/24/2006 12:41:32
Hi,

the new gcc propagates const-ness from structs to struct members.
This exposes a build problem, in that an assignment in
sig_machdep.c's cpu_setmcontext() loses a qualification, and that
gets turned into an error with -Werror.

Nick Hudson suggested that the passed mcontext should probably
not be modified, only the trap frame should get the result of the
"masked MSR" register value.

Since I'm not intimate with the powerpc code, I have to ask if
this looks reasonable:


Index: sig_machdep.c
===================================================================
RCS file: /u/nb/src/sys/arch/powerpc/powerpc/sig_machdep.c,v
retrieving revision 1.25
diff -u -r1.25 sig_machdep.c
--- sig_machdep.c       26 Mar 2006 16:15:57 -0000      1.25
+++ sig_machdep.c       24 Oct 2006 10:33:38 -0000
@@ -216,20 +216,13 @@
 cpu_setmcontext(struct lwp *l, const mcontext_t *mcp, unsigned int flags)
 {
        struct trapframe *tf = trapframe(l);
-       __greg_t *gr = mcp->__gregs;
+       const __greg_t *gr = mcp->__gregs;
 #ifdef PPC_HAVE_FPU
        struct pcb *pcb = &l->l_addr->u_pcb;
 #endif
 
        /* Restore GPR context, if any. */
        if (flags & _UC_CPU) {
-               /*
-                * Accept all user-settable bits without complaint;
-                * userland should not need to know the machine-specific
-                * MSR value.
-                */
-               gr[_REG_MSR] = (gr[_REG_MSR] & PSL_USERMOD) | PSL_USERSET;
-
 #ifdef PPC_HAVE_FPU
                /*
                 * Always save the FP exception mode in the PCB.
@@ -242,7 +235,12 @@
                tf->cr   = gr[_REG_CR];
                tf->lr   = gr[_REG_LR];
                tf->srr0 = gr[_REG_PC];
-               tf->srr1 = gr[_REG_MSR];
+               /*
+                * Accept all user-settable bits without complaint;
+                * userland should not need to know the machine-specific
+                * MSR value.
+                */
+               tf->srr1 = (gr[_REG_MSR] & PSL_USERMOD) | PSL_USERSET;
                tf->ctr  = gr[_REG_CTR];
                tf->xer  = gr[_REG_XER];
 #ifdef PPC_OEA


Regards,

- Havard