Subject: Re: ibm4xx pci
To: None <email@example.com>
From: Yoshihiro Masuda <firstname.lastname@example.org>
Date: 06/02/2006 08:56:30
I think so to.
Since some powerpc device such as 8555 does not have any HOST-PCI
bridge on pci bus, cpu can be seen directory on PCI bus 0 dev 0
function 0. For such device, pci bus should atttach to cpubus(ocb?)
From: Izumi Tsutsui <email@example.com>
Subject: Re: ibm4xx pci (Re: IBM405GP/GPr OPB bus_space endian (powerpc/ibm4xx/dev/opb.c))
Date: Wed, 10 May 2006 22:25:51 +0900
> In article <4461C1F1.firstname.lastname@example.org>
> shige@NetBSD.org wrote:
> > Why is pchb below on plb directly?
> > (cf. On i386 port, mainbus -> pci -> pchb.)
> Maybe difference between physical and logical structures, as Allen said.
> From software view, the PCI bridge can be seen via PCI configuration
> space. It's a logical "PCI-HOST bridge" PCI device.
> On real hardware, the PCI bridge is located on CPU local bus.
> While it's called "pchb" on evbppc, it isn't the same device
> with the former PCI-HOST bridge device seen via PCI, but a bus
> controller attached to the local bus.
> We shouldn't call the latter one "pchb" to avoid confusion?
> (on arc it's called "necpb" and on evbmips it's "aupci", I think)
> Izumi Tsutsui