Re: ibm4xx pci (Re: IBM405GP/GPr OPB bus_space endian (powerpc/ibm4xx/dev/opb.c))

[Allen Briggs <briggs%netbsd.org@localhost>]

On Fri, May 12, 2006 at 05:49:49AM +0900, Izumi Tsutsui wrote:
> Including accesses against PCI configuration space of the bridge itself?

Yes.  Configuration cycles initiated by the bridge that also target
the bridge are problematic (on some hardware).

> If so, I guess we can handle it simply to have some check against
> bus/dev/function in pci_conf_read(9) like cobalt/pci/pci_machdep.c.

Yes.  Those ports should just not probe those addresses.
And they already handle that.

> BTW, current powerpc/ibm4xx/pci/pchb.c (which configures the bridge
> at localbus) use pci_conf_read(9) in the match (probe) function,
> but it seems ugly a bit for me. Isn't it enough to check CPU ID
> (or something), as Jason said?

I think the intent is to be more general.  IBM has "Blue Logic"
which allows them to take the CPU cores and various other large
chunks of logic (PCI, PCI-X, EMAC, TCP/IP offload, PCI-Express,
etc.) and mix / match them into new cores.  I believe the intent
is to use the information in the bridge to control the bridge so
that it would "just work" if IBM used it in a different part
later on.  I think.  :-)

-allen

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