Izumi Tsutsui wrote:
> Well, I guess Jason just said not to attach plb at cpu.
> Anyway, we should remember that Jason is an important key developer
> of whole NetBSD ;-)

I'm sorry.

> IMO, it's better to summarize how many possible 4xx CPU variants
> should be handled in that layer, and then design structure for
> each of them before implementing it. At least there is another
> port for PPC405D5Xn core:
> http://mail-index.netbsd.org/port-powerpc/2006/04/26/0000.html

I don't know the details of PPC405Core.
On Old IBM product briefs, there are 3-type cores, 405A3/405B3/405D4.
I don't know PPC440Cores.
And also I don't know which processors have what kind of cores.

Here is a list of 4xx Embedded Processors:

+-------+-------------------------------------------------------+
| CPU	| Devices						|
+-------+---------------+---------------------------------------+
|	| 405D4? Core	| DCU  8KB/ICU 16KB/DCR/UICx1		|
|405CR	| PLB3		| OPB/SDRAM/EBC/CodePack		|
|	| OPB		| GPIOx1/IICx1/UARTx2			|
+-------+---------------+---------------------------------------+
|	| 405B3? Core	| DCU 16KB/ICU 16KB/DCR/OCM/UICx1	|
|405EP	| PLB3		| OPB/SDRAM/EBC/PCI 2.2/MAL		|
|	| OPB		| GPIOx1/IICx1/UARTx2/EMACx2/GPT	|
+-------+---------------+---------------------------------------+
|	| 405D4? Core	| DCU  8KB/ICU 16KB/DCR/OCM/UICx1	|
|405GP	| PLB3		| OPB/SDRAM/EBC/PCI 2.2/MAL/CodePack	|
|	| OPB		| GPIOx1/IICx1/UARTx2/EMACx1		|
+-------+---------------+---------------------------------------+
|	| 405B3? Core	| DCU 16KB/ICU 16KB/DCR/OCM/UIC		|
|405GPr | PLB3		| OPB/SDRAM/EBC/PCI 2.2/MAL/CodePack	|
|	| OPB		| GPIOx1/IICx1/UARTx2/EMACx1		|
+-------+---------------+---------------------------------------+
|	| 405D4? Core	| DCU 16KB/ICU 16KB/DCR/UICx2		|
|405H	| PLB3		| OPB/SDRAM/EBC/PCI 2.2/MALx3		|
|	| OPB		| GPIOx2/IICx1/UARTx2/EMACx4		|
+-------+---------------+---------------------------------------+
|	|		|					|
|405L	|		|					|
|	|		|					|
+-------+---------------+---------------------------------------+
|	| ? Core	| DCU 32KB/ICU 32KB/DCR/UIC		|
|440GP	| PLB4		| OPB/SDRAM/SRAM/PCI-X/MAL		|
|	| OPB		| GPIOx1/IICx2/UARTx2/EMACx2/GPT/EPC	|
+-------+---------------+---------------------------------------+
|	| ? Core	| DCU 32KB/ICU 32KB/L2Ctrl/DCR/UIC	|
|440GX	| PLB4		| OPB/SDRAM/SRAM/PCI-X/MAL/I2O		|
|	| OPB		| GPIOx1/IICx2/UARTx2/EMACx2/GPT/EPC	|
+-------+---------------+---------------------------------------+
|	| ? Core	| DCU 32KB/ICU 32KB/DCR/UIC/FPU		|
|440EP	| PLB4		| OPB1/SDRAM/PLB-PLB			|
|	| PLB3		| OPB0/EPC/PCI 2.2/MAL			|
|	| OPB0		| GPIOx1/IICx2/UARTx4/EMACx2/GPT	|
|	|		| /SPI/BSC/USB1.0			|
|	| OPB1		| USB2.0				|
+-------+---------------+---------------------------------------+
|	| ? Core	| DCU 32KB/ICU 32KB/DCR/UIC/FPU		|
|440EPx	| PLB4		| OPB1/SDRAM/PLB-PLB/OCM/MAL		|
|	|		| /Kasumi Engine/TruboSecurityEngine	|
|	| PLB3		| OPB0/EPC/PCI 2.2			|
|	| OPB0		| GPIOx1/IICx2/UARTx4/EMACx2/GPT	|
|	|		| /SPI/BSC				|
|	| OPB1		| USB2.0				|
+-------+---------------+---------------------------------------+
|	| ? Core	| DCU 32KB/ICU 32KB/DCR/UIC		|
|440GR	| PLB4		| SDRAM/PLB-PLB				|
|	| PLB3		| OPB/EPC/PCI 2.2/MAL			|
|	| OPB		| GPIOx1/IICx2/UARTx4/EMACx2/GPT/SPI/BSC|
+-------+---------------+---------------------------------------+
|	| ? Core	| DCU 32KB/ICU 32KB/DCR/UIC		|
|440GRx	| PLB4		| SDRAM/PLB-PLB/OCM/MAL			|
|	|		| /Kasumi Engine/TruboSecurityEngine	|
|	| PLB3		| OPB/EPC/PCI 2.2			|
|	| OPB		| GPIOx1/IICx2/UARTx4/EMACx2/GPT/SPI/BSC|
+-------+---------------+---------------------------------------+
|	| ? Core	| DCU 32KB/ICU 32KB/DCR/UIC		|
|440SP	| PLB4		| OPB/SDRAM/PCI-X/MAL/I2O		|
|	| OPB		| GPIOx1/IICx2/UARTx3/EMACx1/GPT/EBC	|
+-------+---------------+---------------------------------------+
|	| ? Core	| DCU 32KB/ICU 32KB/DCR/UIC		|
|440SPe	| PLB4		| OPB/SDRAM/PCI-X/PCI-ExpressMAL/I2O	|
|	| OPB		| GPIOx1/IICx2/UARTx3/EMACx1/GPT/EBC	|
+-------+---------------+---------------------------------------+

-- 
Kind Regards,
--- shige
Shigeyuki Fukushima <shige@{FreeBSD,jp.FreeBSD,NetBSD}.org>