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Re: Changing ibm4xx device tree.
Shigeyuki Fukushima wrote:
> Simon Burge wrote:
>>> [ what hangs of what discussion ]
>> Pretty much agree with all you say here.
>
> If it is reasonable that plb is a root device,
> how about a patch attached with this mail?
> - source diff
> - powerpc/include/ibm4xx/ibm405gpr.h
> - powerpc/ibm4xx/ibm405gpr.c
> - powerpc/ibm4xx/ibm4xx.h
- powerpc/ibm4xx/ibm405gp.c
- powerpc/ibm4xx/dev/pchb.c (rearranged)
- powerpc/ibm4xx/dev/pchbvar.h
Configuring pchb with `void *arg' which is defined in
ibm405gp.c or ibm405gpr.c.
Is it ok?
--
Kind Regards,
--- shige
Shigeyuki Fukushima <shige@{FreeBSD,jp.FreeBSD,NetBSD}.org>
? powerpc/ibm4xx/ibm405gp.c
? powerpc/ibm4xx/ibm405gpr.c
? powerpc/ibm4xx/ibm4xx.h
? powerpc/ibm4xx/dev/pchb.c
? powerpc/ibm4xx/dev/pchbvar.h
? powerpc/include/ibm4xx/ibm405gpr.h
Index: powerpc/conf/files.ibm405gp
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/conf/files.ibm405gp,v
retrieving revision 1.4
diff -u -r1.4 files.ibm405gp
--- powerpc/conf/files.ibm405gp 11 Dec 2005 12:18:42 -0000 1.4
+++ powerpc/conf/files.ibm405gp 5 May 2006 23:55:38 -0000
@@ -11,9 +11,10 @@
# On-chip PCI bridge
device pchb : pcibus
attach pchb at plb
-file arch/powerpc/ibm4xx/pci/pchb.c pchb
-file arch/powerpc/ibm4xx/pci/pci_machdep.c pci
-file arch/powerpc/ibm4xx/dev/ibm405gp.c
+file arch/powerpc/ibm4xx/dev/pchb.c pchb
+#file arch/powerpc/ibm4xx/pci/pchb.c pchb
+#file arch/powerpc/ibm4xx/pci/pci_machdep.c pci
+#file arch/powerpc/ibm4xx/dev/ibm405gp_pci.c
# On-chip IIC controller
device gpiic: i2cbus, i2c_bitbang
Index: powerpc/ibm4xx/dev/opb.c
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/ibm4xx/dev/opb.c,v
retrieving revision 1.23
diff -u -r1.23 opb.c
--- powerpc/ibm4xx/dev/opb.c 13 Mar 2006 15:31:11 -0000 1.23
+++ powerpc/ibm4xx/dev/opb.c 5 May 2006 23:55:38 -0000
@@ -78,45 +78,7 @@
#include <powerpc/spr.h>
#include <powerpc/ibm4xx/dev/opbvar.h>
#include <powerpc/ibm4xx/dev/plbvar.h>
-#include <powerpc/ibm4xx/ibm405gp.h>
-/*
- * The devices on the On-chip Peripheral Bus to the 405GP CPU.
- */
-const struct opb_dev {
- int pvr;
- const char *name;
- bus_addr_t addr;
- int instance;
- int irq;
-} opb_devs [] = {
- /* IBM405GP */
- { IBM405GP, "com", IBM405GP_UART0_BASE, 0, 0 },
- { IBM405GP, "com", IBM405GP_UART1_BASE, 1, 1 },
- { IBM405GP, "emac", IBM405GP_EMAC0_BASE, 0, 9 }, /* XXX: really
irq 9..15 */
- { IBM405GP, "opbgpio", IBM405GP_GPIO0_BASE, 0, -1 },
- { IBM405GP, "gpiic",IBM405GP_IIC0_BASE, 0, 2 },
- { IBM405GP, "wdog", -1, 0, -1 },
-
- /* IBM405GPR */
- { IBM405GPR, "com", IBM405GP_UART0_BASE, 0, 0 },
- { IBM405GPR, "com", IBM405GP_UART1_BASE, 1, 1 },
- { IBM405GPR, "emac", IBM405GP_EMAC0_BASE, 0, 9 }, /* XXX: really
irq 9..15 */
- { IBM405GPR, "opbgpio", IBM405GP_GPIO0_BASE, 0, -1 },
- { IBM405GPR, "gpiic",IBM405GP_IIC0_BASE, 0, 2 },
- { IBM405GPR, "wdog", -1, 0, -1 },
- { 0, NULL }
-};
-
-const struct opb_limit {
- int pvr;
- bus_addr_t base;
- bus_addr_t limit;
-} opb_limits[] = {
- { IBM405GP, IBM405GP_UART0_BASE, IBM405GP_UART0_BASE + 0xfff },
- { IBM405GPR, IBM405GP_UART0_BASE, IBM405GP_UART0_BASE + 0xfff },
- { 0, 0, 0 }
-};
static int opb_match(struct device *, struct cfdata *, void *);
static void opb_attach(struct device *, struct device *, void *);
@@ -128,8 +90,7 @@
opb_match, opb_attach, NULL, NULL);
static struct powerpc_bus_space opb_tag = {
- _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE,
- 0x0, IBM405GP_UART0_BASE, 0x1000
+ _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE, 0x0
};
static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(8)]
__attribute__((aligned(8)));
@@ -170,27 +131,27 @@
opb_attach(struct device *parent, struct device *self, void *aux)
{
struct plb_attach_args *paa = aux;
+ struct opb_dev *opb_devs = (struct opb_dev *)(paa->arg);
struct opb_attach_args oaa;
bus_space_tag_t tag;
- int i, pvr;
printf("\n");
- pvr = mfpvr() >> 16;
tag = opb_get_bus_space_tag();
- for (i = 0; opb_devs[i].name != NULL; i++) {
- if (opb_devs[i].pvr != pvr)
- continue;
- oaa.opb_name = opb_devs[i].name;
- oaa.opb_addr = opb_devs[i].addr;
- oaa.opb_instance = opb_devs[i].instance;
- oaa.opb_irq = opb_devs[i].irq;
+ while (opb_devs && opb_devs->name != NULL) {
+ oaa.opb_name = opb_devs->name;
+ oaa.opb_addr = opb_devs->addr;
+ oaa.opb_instance = opb_devs->instance;
+ oaa.opb_irq = opb_devs->irq[0];
+ oaa.opb_arg = opb_devs->arg;
oaa.opb_bt = tag;
oaa.opb_dmat = paa->plb_dmat;
(void) config_found_sm_loc(self, "opb", NULL, &oaa, opb_print,
opb_submatch);
+
+ opb_devs++;
}
}
@@ -213,18 +174,14 @@
bus_space_tag_t
opb_get_bus_space_tag(void)
{
- int i, pvr;
if (!opb_tag_init_done) {
- pvr = mfpvr() >> 16;
+ struct opb_bus_space *obs;
- for (i = 0; opb_limits[i].pvr && opb_limits[i].pvr != pvr; i++)
- ;
- if (opb_limits[i].pvr == 0)
- panic("opb_get_bus_space_tag: no limits for this CPU!");
+ obs = opb_get_bus_space_cpu();
- opb_tag.pbs_base = opb_limits[i].base;
- opb_tag.pbs_limit = opb_limits[i].limit;
+ opb_tag.pbs_base = obs->bs_base;
+ opb_tag.pbs_limit = obs->bs_limit;
if (bus_space_init(&opb_tag, "opbtag",
ex_storage, sizeof(ex_storage)))
Index: powerpc/ibm4xx/dev/opbvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/ibm4xx/dev/opbvar.h,v
retrieving revision 1.4
diff -u -r1.4 opbvar.h
--- powerpc/ibm4xx/dev/opbvar.h 21 Feb 2006 04:25:29 -0000 1.4
+++ powerpc/ibm4xx/dev/opbvar.h 5 May 2006 23:55:38 -0000
@@ -35,16 +35,38 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#ifndef _POWERPC_IBM4XX_DEV_OPBVAR_H_
+#define _POWERPC_IBM4XX_DEV_OPBVAR_H_
+
#include <machine/bus.h>
+struct opb_dev {
+ const char *name;
+ int instance;
+ bus_addr_t addr;
+ int irq[8];
+ void *arg;
+};
+
+struct opb_bus_space {
+ bus_addr_t bs_base;
+ bus_addr_t bs_limit;
+};
+
struct opb_attach_args {
- const char *opb_name;
- int opb_instance;
- u_long opb_addr;
- int opb_irq;
- bus_space_tag_t opb_bt; /* Bus space tag */
- bus_dma_tag_t opb_dmat; /* DMA tag */
+ const char *opb_name;
+ int opb_instance;
+ u_long opb_addr;
+ int opb_irq;
+ bus_space_tag_t opb_bt; /* Bus space tag */
+ bus_dma_tag_t opb_dmat; /* DMA tag */
+ void *opb_arg;
};
/* For use before opb_attach() is called */
extern bus_space_tag_t opb_get_bus_space_tag(void);
+
+/* Implemented at per-cpu module */
+extern struct opb_bus_space *opb_get_bus_space_cpu(void);
+
+#endif /* _POWERPC_IBM4XX_DEV_OPBVAR_H_ */
Index: powerpc/ibm4xx/dev/plb.c
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/ibm4xx/dev/plb.c,v
retrieving revision 1.14
diff -u -r1.14 plb.c
--- powerpc/ibm4xx/dev/plb.c 11 Dec 2005 12:18:42 -0000 1.14
+++ powerpc/ibm4xx/dev/plb.c 5 May 2006 23:55:38 -0000
@@ -80,18 +80,7 @@
#include <machine/bus.h>
#include <powerpc/ibm4xx/dev/plbvar.h>
-#include <powerpc/ibm4xx/ibm405gp.h>
-/*
- * The devices that attach to the processor local bus on the 405GP CPU.
- */
-const struct plb_dev plb_devs [] = {
- { "cpu", },
- { "ecc", },
- { "opb", },
- { "pchb", },
- { NULL }
-};
static int plb_match(struct device *, struct cfdata *, void *);
static void plb_attach(struct device *, struct device *, void *);
@@ -129,7 +118,7 @@
plb_match(struct device *parent, struct cfdata *cf, void *aux)
{
- return (1);
+ return 1;
}
/*
@@ -140,22 +129,14 @@
{
struct plb_attach_args paa;
struct plb_dev *local_plb_devs = aux;
- int i;
printf("\n");
- for (i = 0; plb_devs[i].plb_name != NULL; i++) {
- paa.plb_name = plb_devs[i].plb_name;
- paa.plb_dmat = &ibm4xx_default_bus_dma_tag;
- paa.plb_irq = PLBCF_IRQ_DEFAULT;
-
- (void) config_found_ia(self, "plb", &paa, plb_print);
- }
-
while (local_plb_devs && local_plb_devs->plb_name != NULL) {
paa.plb_name = local_plb_devs->plb_name;
paa.plb_dmat = &ibm4xx_default_bus_dma_tag;
paa.plb_irq = PLBCF_IRQ_DEFAULT;
+ paa.arg = local_plb_devs->arg;
(void) config_found_ia(self, "plb", &paa, plb_print);
local_plb_devs++;
@@ -172,5 +153,5 @@
if (paa->plb_irq != PLBCF_IRQ_DEFAULT)
aprint_normal(" irq %d", paa->plb_irq);
- return (UNCONF);
+ return UNCONF;
}
Index: powerpc/ibm4xx/dev/plbvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/ibm4xx/dev/plbvar.h,v
retrieving revision 1.4
diff -u -r1.4 plbvar.h
--- powerpc/ibm4xx/dev/plbvar.h 11 Dec 2005 12:18:42 -0000 1.4
+++ powerpc/ibm4xx/dev/plbvar.h 5 May 2006 23:55:38 -0000
@@ -35,14 +35,23 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#ifndef _POWERPC_IBM4XX_DEV_PLBVAR_H_
+#define _POWERPC_IBM4XX_DEV_PLBVAR_H_
+
#include <machine/bus.h>
struct plb_dev {
- const char *plb_name;
+ const char *plb_name;
+ int instance;
+ int irq;
+ void *arg;
};
struct plb_attach_args {
- const char *plb_name;
- bus_dma_tag_t plb_dmat; /* DMA tag */
- int plb_irq;
+ const char *plb_name;
+ bus_dma_tag_t plb_dmat; /* DMA tag */
+ int plb_irq;
+ void *arg;
};
+
+#endif /* _POWERPC_IBM4XX_DEV_PLBVAR_H_ */
Index: powerpc/include/ibm4xx/ibm405gp.h
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/include/ibm4xx/ibm405gp.h,v
retrieving revision 1.10
diff -u -r1.10 ibm405gp.h
--- powerpc/include/ibm4xx/ibm405gp.h 11 Dec 2005 12:18:43 -0000 1.10
+++ powerpc/include/ibm4xx/ibm405gp.h 5 May 2006 23:55:38 -0000
@@ -93,7 +93,13 @@
#define IBM405GP_BOOT_ROM_END 0xffffffff
#ifndef _LOCORE
+
void ibm4xx_show_pci_map(void);
void ibm4xx_setup_pci(void);
+
+#include <powerpc/ibm4xx/ibm4xx.h>
+extern struct ibm4xx_cpudev ibm405gp_cpu;
+
#endif /* _LOCORE */
+
#endif /* _IBM4XX_IBM405GP_H_ */
Index: powerpc/include/ibm4xx/pci_machdep.h
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/include/ibm4xx/pci_machdep.h,v
retrieving revision 1.4
diff -u -r1.4 pci_machdep.h
--- powerpc/include/ibm4xx/pci_machdep.h 11 Dec 2005 12:18:43 -0000
1.4
+++ powerpc/include/ibm4xx/pci_machdep.h 5 May 2006 23:55:38 -0000
@@ -62,6 +62,7 @@
int rootnode; /* PCI controller */
struct extent *ioext; /* PCI I/O extent */
struct extent *memext; /* PCI memory extent */
+ void *sc;
};
/*
Index: evbppc/conf/files.obs405
===================================================================
RCS file: /cvsroot/src/sys/arch/evbppc/conf/files.obs405,v
retrieving revision 1.15
diff -u -r1.15 files.obs405
--- evbppc/conf/files.obs405 13 Mar 2006 16:20:58 -0000 1.15
+++ evbppc/conf/files.obs405 5 May 2006 23:55:38 -0000
@@ -2,8 +2,8 @@
#
# obs405-specific configuration info
+file arch/powerpc/ibm4xx/ibm405gpr.c
file arch/powerpc/ibm4xx/ibm4xx_autoconf.c
-file arch/powerpc/ibm4xx/ibm4xxgpx_autoconf.c
file arch/powerpc/ibm4xx/ibm40x_machdep.c
file arch/powerpc/ibm4xx/ibm4xx_machdep.c
file arch/powerpc/ibm4xx/intr.c
Index: evbppc/obs405/obs266_autoconf.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbppc/obs405/obs266_autoconf.c,v
retrieving revision 1.2
diff -u -r1.2 obs266_autoconf.c
--- evbppc/obs405/obs266_autoconf.c 11 Dec 2005 12:17:12 -0000 1.2
+++ evbppc/obs405/obs266_autoconf.c 5 May 2006 23:55:39 -0000
@@ -40,6 +40,37 @@
#include <machine/obs266.h>
+#include <powerpc/ibm4xx/ibm405gpr.h>
+#include <powerpc/ibm4xx/dcr405gp.h>
+
+
+/*
+ * Determine device configuration for a machine.
+ */
+void
+cpu_configure(void)
+{
+
+ intr_init();
+ calc_delayconst();
+
+ /* Make sure that timers run at CPU frequency */
+ mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);
+
+ if (config_rootfound("plb", ibm405gpr_cpu.arg) == NULL)
+ panic("configure: mainbus not configured");
+
+ printf("biomask %x netmask %x ttymask %x\n", (u_short)imask[IPL_BIO],
+ (u_short)imask[IPL_NET], (u_short)imask[IPL_TTY]);
+
+ (void)spl0();
+
+ /*
+ * Now allow hardware interrupts.
+ */
+ __asm volatile ("wrteei 1");
+}
+
void device_register(struct device *dev, void *aux)
{
/* $NetBSD$ */
/*
* Copyright 2001 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Simon Burge and Eduardo Horvath for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _POWERPC_IBM4XX_IBM405GP_H_
#define _POWERPC_IBM4XX_IBM405GP_H_
#ifdef _KERNEL
/*
* Memory and PCI addresses
*/
/* PCI I/O - PCI I/O accesses from 0 to 64kB-1 (64kB) */
#define PCI_IO_LOW_START 0xe8000000
#define PCI_IO_LOW_END 0xe800ffff
/* PCI I/O - PCI I/O accesses from 8MB to 64MB-1 (56MB) */
#define PCI_IO_HIGH_START 0xe8800000
#define PCI_IO_HIGH_END 0xebffffff
/* PCI I/O - PLB side of PCI I/O address space */
#define PLB_PCI_IO_START 0xe8000000
/* PCI I/O - PCI side of PCI I/O address space */
#define PCI_PCI_IO_START 0x00000000
#define PCI_PCI_IO_SIZE 0xffff
/* PCI Memory - 1.625GB */
#define PCI_MEM_START 0x80000000
#define PCI_MEM_END 0xe7ffffff
/*
* On-chip Peripheral Device Addresses
*/
#define UART0_BASE 0xef600300
#define UART1_BASE 0xef600400
#define IIC0_BASE 0xef600500
#define OPBA0_BASE 0xef600600
#define GPIO0_BASE 0xef600700
#define EMAC0_BASE 0xef600800
/* PCI Configuration */
#define PCIC0_BASE 0xeec00000
#define PCIC0_SIZE 8
/* PCI Interrupt Acknowledge (read: 0xeed00000 0xeed00003 - 4 bytes) */
#define PCIIA0 0xeed00000
#define PCIIA0_SIZE 4
/* PCI Special Cycle (write: 0xeed00000 0xeed00003 - 4 bytes) */
#define PCISC0 0xeed00000
#define PCISC0_SIZE 4
/* PCI Local Configuration */
#define PCIL0_BASE 0xef400000
#define PCIL0_SIZE 0x40
#ifndef _LOCORE
#include <powerpc/ibm4xx/ibm4xx.h>
extern struct ibm4xx_cpudev ibm405gpr_cpu;
#endif /* !_LOCORE */
#endif /* _KERNEL */
#endif /* !_POWERPC_IBM4XX_IBM405GP_H_ */
/* $NetBSD$ */
/*
* Copyright (c) 2006 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed
* to The NetBSD Foundation, Inc.
* by Shigeyuki Fukushima.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD$");
#include <sys/param.h>
#include <machine/cpu.h>
#include <powerpc/ibm4xx/ibm405gp.h>
#include <powerpc/ibm4xx/ibm4xx.h>
#include <powerpc/ibm4xx/dev/plbvar.h>
#include <powerpc/ibm4xx/dev/opbvar.h>
#include <powerpc/ibm4xx/dev/pchbvar.h>
struct opb_dev ibm405gp_opb_devices[] = {
{ "com", 0, IBM405GP_UART0_BASE, { 0, -1, -1, -1, -1, -1, -1, -1
}, NULL },
{ "com", 1, IBM405GP_UART1_BASE, { 1, -1, -1, -1, -1, -1, -1, -1
}, NULL },
{ "emac", 0, IBM405GP_EMAC0_BASE, { 9, 10, 11, 12, 13, 14, 15, -1
}, NULL },
{ "opbgpio", 0, IBM405GP_GPIO0_BASE, { -1, -1, -1, -1, -1, -1, -1, -1
}, NULL },
{ "gpiic", 0, IBM405GP_IIC0_BASE, { 2, -1, -1, -1, -1, -1, -1, -1
}, NULL },
{ "wdog", 0, -1, { -1, -1, -1, -1, -1, -1, -1, -1 }, NULL },
{ NULL }
};
struct opb_bus_space ibm405gp_opb_bus_space = {
IBM405GP_UART0_BASE,
IBM405GP_UART0_BASE + 0xffff,
};
struct ibm4xx_pci_config ibm405gp_pci_config = {
/* pci_lowmem_base */
IBM405GP_PCI_MEM_START,
/* pci_highmem_base */
0,
/* pchb_io_bust */
{
_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_IO_TYPE,
IBM405GP_PLB_PCI_IO_START, /* offset */
IBM405GP_PCI_PCI_IO_START, /* extent base */
IBM405GP_PCI_PCI_IO_START + 0xffff /* extent limit */
},
/* pchb_mem_bust */
{
_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE,
0x00000000, /* offset */
IBM405GP_PCI_MEM_START, /* extent base */
IBM405GP_PCI_MEM_START + 0x1fffffff /* extent limit */
},
/* pcic_bust */
{
_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE,
0x00000000, /* offset */
IBM405GP_PCIC0_BASE, /* extent base */
IBM405GP_PCIC0_BASE + 8 /* extent limit */
},
/* pcil_bust */
{
_BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
IBM405GP_PCIL0_BASE, /* offset */
0x0, /* extent base */
0x40 /* extent limit */
}
};
struct plb_dev ibm405gp_plb_devices[] = {
{ "cpu", 0, -1, NULL },
{ "ecc", 0, 16, NULL },
{ "opb", 0, -1, &ibm405gp_opb_devices },
{ "pchb", 0, -1, &ibm405gp_pci_config },
{ NULL }
};
struct ibm4xx_cpudev ibm405gp_cpu = {
"IBM PPC405GP",
PVR_405GP,
&ibm405gp_plb_devices,
};
struct opb_bus_space *
opb_get_bus_space_cpu(void)
{
return &ibm405gp_opb_bus_space;
}
/* $NetBSD$ */
/*
* Copyright (c) 2006 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed
* to The NetBSD Foundation, Inc.
* by Shigeyuki Fukushima.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD$");
#include <sys/param.h>
#include <machine/cpu.h>
#include <powerpc/ibm4xx/ibm405gpr.h>
#include <powerpc/ibm4xx/ibm4xx.h>
#include <powerpc/ibm4xx/dev/plbvar.h>
#include <powerpc/ibm4xx/dev/opbvar.h>
#include <powerpc/ibm4xx/dev/pchbvar.h>
struct opb_dev ibm405gpr_opb_devices[] = {
{ "com", 0, UART0_BASE, { 0, -1, -1, -1, -1, -1, -1, -1 }, NULL },
{ "com", 1, UART1_BASE, { 1, -1, -1, -1, -1, -1, -1, -1 }, NULL },
{ "emac", 0, EMAC0_BASE, { 9, 10, 11, 12, 13, 14, 15, -1 }, NULL },
{ "opbgpio", 0, GPIO0_BASE, { -1, -1, -1, -1, -1, -1, -1, -1 }, NULL },
{ "gpiic", 0, IIC0_BASE, { 2, -1, -1, -1, -1, -1, -1, -1 }, NULL },
{ "wdog", 0, -1, { -1, -1, -1, -1, -1, -1, -1, -1 }, NULL },
{ NULL }
};
struct opb_bus_space ibm405gpr_opb_bus_space = {
UART0_BASE,
UART0_BASE + 0xffff,
};
struct ibm4xx_pci_config ibm405gpr_pci_config = {
/* pci_lowmem_base */
PCI_MEM_START,
/* pci_highmem_base */
0,
/* pchb_io_bust */
{
_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_IO_TYPE,
PLB_PCI_IO_START, /* offset */
PCI_PCI_IO_START, /* extent base */
PCI_PCI_IO_START + PCI_PCI_IO_SIZE /* extent limit */
},
/* pchb_mem_bust */
{
_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE,
0x00000000, /* offset */
PCI_MEM_START, /* extent base */
PCI_MEM_START + 0x1fffffff /* extent limit */
},
/* pcic_bust */
{
_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE,
0x00000000, /* offset */
PCIC0_BASE, /* extent base */
PCIC0_BASE + PCIC0_SIZE /* extent limit */
},
/* pcil_bust */
{
_BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
PCIL0_BASE, /* offset */
0x0, /* extent base */
PCIL0_SIZE /* extent limit */
}
};
struct plb_dev ibm405gpr_plb_devices[] = {
{ "cpu", 0, -1, NULL },
{ "ecc", 0, 16, NULL },
{ "opb", 0, -1, &ibm405gpr_opb_devices },
{ "pchb", 0, -1, &ibm405gpr_pci_config },
{ NULL }
};
struct ibm4xx_cpudev ibm405gpr_cpu = {
"IBM PPC405GPr",
PVR_405GPR,
&ibm405gpr_plb_devices,
};
struct opb_bus_space *
opb_get_bus_space_cpu(void)
{
return &ibm405gpr_opb_bus_space;
}
/* $NetBSD$ */
/*
* Copyright (c) 2006 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed
* to The NetBSD Foundation, Inc.
* by Shigeyuki Fukushima.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _POWERPC_IBM4XX_IBM4XX_H_
#define _POWERPC_IBM4XX_IBM4XX_H_
struct ibm4xx_cpudev {
const char *name; /* CPU name */
int pvr; /* Processor Version Number */
void *arg; /* root devices args */
};
#endif /* _POWERPC_IBM4XX_IBM4XX_H_ */
/* $NetBSD$ */
/* NetBSD: powerpc/ibm4xx/dev/ibm405gp.c,v 1.4 2005/12/11 12:18:42 christos */
/* NetBSD: powerpc/ibm4xx/pci/pchb.c,v 1.5 2005/12/11 12:18:43 christos */
/* NetBSD: powerpc/ibm4xx/pci/pci_machdep.c,v 1.4 2006/03/29 17:50:33 shige */
/*-
* Copyright (c) 1996 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright 2001 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
* Copyright (c) 1994 Charles M. Hannum. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles M. Hannum.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD$");
#include "pci.h"
#include "opt_pci.h"
#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/extent.h>
#include <sys/malloc.h>
#define _IBM4XX_BUS_DMA_PRIVATE
#include <machine/bus.h>
#include <machine/intr.h>
#include <powerpc/ibm4xx/dev/plbvar.h>
#include <powerpc/ibm4xx/dev/pchbvar.h>
#include <powerpc/ibm4xx/dev/pcicreg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcidevs.h>
#include <dev/pci/pciconf.h>
struct pchb_softc {
struct device sc_dev;
struct ibm4xx_pci_chipset sc_pc;
bus_addr_t sc_lowmem_base;
bus_addr_t sc_highmem_base;
bus_space_tag_t sc_pchb_iot;
bus_space_tag_t sc_pchb_memt;
/* PCI Configuration */
bus_space_tag_t sc_pcic_iot;
bus_space_handle_t sc_pcic_ioh;
/* PCI Local Configuration */
bus_space_tag_t sc_pcil_iot;
bus_space_handle_t sc_pcil_ioh;
};
static int pchbmatch(struct device *, struct cfdata *, void *);
static void pchbattach(struct device *, struct device *, void *);
static int pchbprint(void *, const char *);
CFATTACH_DECL(pchb, sizeof(struct pchb_softc),
pchbmatch, pchbattach, NULL, NULL);
static void setup_pci(struct pchb_softc *);
#ifdef PCI_CONFIGURE_VERBOSE
static void show_pci_map(struct pchb_softc *);
#endif
static int pcifound = 0;
static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(1)]
__attribute__((aligned(8)));
static int
pchbmatch(struct device *parent, struct cfdata *cf, void *aux)
{
struct plb_attach_args *paa = aux;
/* match only pchb devices */
if (strcmp(paa->plb_name, cf->cf_name) != 0)
return 0;
if (pcifound)
return 0;
return 1;
}
static void
pchbattach(struct device *parent, struct device *self, void *aux)
{
struct pchb_softc *sc = (struct pchb_softc *)self;
struct plb_attach_args *paa = aux;
struct ibm4xx_pci_config *pci = (struct ibm4xx_pci_config *)(paa->arg);
struct pcibus_attach_args pba;
pcitag_t tag;
int class, id;
char devinfo[256];
#ifdef PCI_CONFIGURE_VERBOSE
extern int pci_conf_debug;
pci_conf_debug = 1;
#endif
sc->sc_pc.rootnode = 0;
sc->sc_pc.sc = sc;
sc->sc_lowmem_base = pci->pci_lowmem_base;
sc->sc_highmem_base = pci->pci_highmem_base;
sc->sc_pchb_iot = &(pci->pchb_io_bust);
sc->sc_pchb_memt = &(pci->pchb_mem_bust);
sc->sc_pcic_iot = &(pci->pcic_bust);
sc->sc_pcil_iot = &(pci->pcil_bust);
#ifdef PCI_CONFIGURE_VERBOSE
aprint_normal("\n");
aprint_normal("PCI Low Mem: 0x%08x\n", pci->pci_lowmem_base);
aprint_normal("PCI High Mem: 0x%08x\n", pci->pci_highmem_base);
aprint_normal("PCI-HOST IO:\n");
aprint_normal(" offset: 0x%08x\n", pci->pchb_io_bust.pbs_offset);
aprint_normal(" base: 0x%08x\n", pci->pchb_io_bust.pbs_base);
aprint_normal(" limit: 0x%08x\n", pci->pchb_io_bust.pbs_limit);
aprint_normal("PCI-HOST MEM:\n");
aprint_normal(" offset: 0x%08x\n", pci->pchb_mem_bust.pbs_offset);
aprint_normal(" base: 0x%08x\n", pci->pchb_mem_bust.pbs_base);
aprint_normal(" limit: 0x%08x\n", pci->pchb_mem_bust.pbs_limit);
aprint_normal("PCI Configuration:\n");
aprint_normal(" offset: 0x%08x\n", pci->pcic_bust.pbs_offset);
aprint_normal(" base: 0x%08x\n", pci->pcic_bust.pbs_base);
aprint_normal(" limit: 0x%08x\n", pci->pcic_bust.pbs_limit);
aprint_normal("PCI Local Configuration:\n");
aprint_normal(" offset: 0x%08x\n", pci->pcil_bust.pbs_offset);
aprint_normal(" base: 0x%08x\n", pci->pcil_bust.pbs_base);
aprint_normal(" limit: 0x%08x\n", pci->pcil_bust.pbs_limit);
#endif
if (bus_space_init(&(pci->pcic_bust), "pcicfg", NULL, 0)
|| bus_space_map(sc->sc_pcic_iot, sc->sc_pcic_iot->pbs_base,
(sc->sc_pcic_iot->pbs_limit - sc->sc_pcic_iot->pbs_base),
0, &(sc->sc_pcic_ioh)) ) {
aprint_normal(": unable to map PCI configuration registers\n");
return;
}
if (bus_space_init(&(pci->pcil_bust), "pcilocalcfg", ex_storage,
sizeof(ex_storage))
|| bus_space_map(sc->sc_pcil_iot, sc->sc_pcil_iot->pbs_base,
(sc->sc_pcil_iot->pbs_limit - sc->sc_pcil_iot->pbs_base),
0, &(sc->sc_pcil_ioh)) ) {
aprint_normal
(": unable to map PCI Local configuration registers\n");
return;
}
tag = pci_make_tag(&(sc->sc_pc), 0, 0, 0);
class = pci_conf_read(&(sc->sc_pc), tag, PCI_CLASS_REG);
id = pci_conf_read(&(sc->sc_pc), tag, PCI_ID_REG);
printf("\n");
pcifound++;
/*
* All we do is print out a description. Eventually, we
* might want to add code that does something that's
* possibly chipset-specific.
*/
pci_devinfo(id, class, 0, devinfo, sizeof(devinfo));
printf("%s: %s (rev. 0x%02x)\n", self->dv_xname, devinfo,
PCI_REVISION(class));
setup_pci(sc);
#ifdef PCI_CONFIGURE_VERBOSE
show_pci_map(sc);
#endif
if (bus_space_init(&(pci->pchb_mem_bust), "pchbmem", NULL, 0))
panic("pchbattach: can't init MEM tag");
if (bus_space_init(&(pci->pchb_io_bust), "pchbio", NULL, 0))
panic("pchbattach: can't init IO tag");
#ifdef PCI_NETBSD_CONFIGURE
sc->sc_pc.memext = extent_create("pcimem",
sc->sc_pchb_memt->pbs_base, sc->sc_pchb_memt->pbs_limit,
M_DEVBUF, NULL, 0, EX_NOWAIT);
sc->sc_pc.ioext = extent_create("pciio",
sc->sc_pchb_iot->pbs_base, sc->sc_pchb_iot->pbs_limit,
M_DEVBUF, NULL, 0, EX_NOWAIT);
/* XXX 32 is magic number */
pci_configure_bus(&(sc->sc_pc), sc->sc_pc.ioext, sc->sc_pc.memext,
NULL, 0, 32);
#endif /* PCI_NETBSD_CONFIGURE */
#ifdef PCI_CONFIGURE_VERBOSE
printf("running config_found PCI\n");
#endif
pba.pba_iot = sc->sc_pchb_iot;
pba.pba_memt = sc->sc_pchb_memt;
pba.pba_dmat = paa->plb_dmat;
pba.pba_dmat64 = NULL;
pba.pba_pc = &(sc->sc_pc);
pba.pba_bus = 0;
pba.pba_bridgetag = NULL;
pba.pba_flags = PCI_FLAGS_MEM_ENABLED | PCI_FLAGS_IO_ENABLED;
config_found_ia(self, "pcibus", &pba, pchbprint);
}
static int
pchbprint(void *aux, const char *p)
{
if (p == NULL)
return (UNCONF);
return QUIET;
}
/*
* Setup proper Local<->PCI mapping
* PCI memory window: 256M @ PCI0MEMBASE with direct memory translation
*/
static void
setup_pci(struct pchb_softc *sc)
{
pcitag_t tag;
#define pcil_bus_space_write_4(c, o, v) \
bus_space_write_4((c)->sc_pcil_iot, (c)->sc_pcil_ioh, o, v);
/* Disable all three memory mappers */
pcil_bus_space_write_4(sc, PCIL_PMM0MA, 0x00000000); /* disabled */
pcil_bus_space_write_4(sc, PCIL_PMM1MA, 0x00000000); /* disabled */
pcil_bus_space_write_4(sc, PCIL_PMM2MA, 0x00000000); /* disabled */
pcil_bus_space_write_4(sc, PCIL_PTM1MS, 0x00000000);
/* Can't really disable PTM1 */
pcil_bus_space_write_4(sc, PCIL_PTM2MS, 0x00000000); /* disabled */
/* Setup memory map #0 */
pcil_bus_space_write_4(sc, PCIL_PMM0MA, 0xf0000001);
/* 256M non-prefetchable, enabled */
pcil_bus_space_write_4(sc, PCIL_PMM0LA, sc->sc_lowmem_base);
pcil_bus_space_write_4(sc, PCIL_PMM0PCILA, sc->sc_lowmem_base);
pcil_bus_space_write_4(sc, PCIL_PMM0PCIHA, sc->sc_highmem_base);
/* Configure PCI bridge */
tag = pci_make_tag(&(sc->sc_pc), 0, 0, 0);
pcil_bus_space_write_4(sc, PCIL_PTM1MS, 0xf0000001); /* Enable PTM1 */
pcil_bus_space_write_4(sc, PCIL_PTM1LA, 0);
/* Set up proper PCI->Local address base. Always enabled */
pci_conf_write(&(sc->sc_pc), tag, PCIC_PTM1BAR, 0);
pci_conf_write(&(sc->sc_pc), tag, PCIC_PTM2BAR, 0);
}
#ifdef PCI_CONFIGURE_VERBOSE
static void
show_pci_map(struct pchb_softc *sc)
{
paddr_t la, lm, pl, ph;
pcitag_t tag;
#define pcil_bus_space_read_4(c, o) \
bus_space_read_4((c)->sc_pcil_iot, (c)->sc_pcil_ioh, o);
printf("Local -> PCI map\n");
la = pcil_bus_space_read_4(sc, PCIL_PMM0LA);
lm = pcil_bus_space_read_4(sc, PCIL_PMM0MA);
pl = pcil_bus_space_read_4(sc, PCIL_PMM0PCILA);
ph = pcil_bus_space_read_4(sc, PCIL_PMM0PCIHA);
printf("0: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n",
la, lm, ph, pl,
(lm & 2) ? "":"not ",
(lm & 1) ? "enabled":"disabled");
la = pcil_bus_space_read_4(sc, PCIL_PMM1LA);
lm = pcil_bus_space_read_4(sc, PCIL_PMM1MA);
pl = pcil_bus_space_read_4(sc, PCIL_PMM1PCILA);
ph = pcil_bus_space_read_4(sc, PCIL_PMM1PCIHA);
printf("1: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n",
la, lm, ph, pl,
(lm & 2) ? "":"not ",
(lm & 1) ? "enabled":"disabled");
la = pcil_bus_space_read_4(sc, PCIL_PMM2LA);
lm = pcil_bus_space_read_4(sc, PCIL_PMM2MA);
pl = pcil_bus_space_read_4(sc, PCIL_PMM2PCILA);
ph = pcil_bus_space_read_4(sc, PCIL_PMM2PCIHA);
printf("2: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n",
la, lm, ph, pl,
(lm & 2) ? "":"not ",
(lm & 1) ? "enabled":"disabled");
printf("PCI -> Local map\n");
tag = pci_make_tag(&(sc->sc_pc), 0, 0, 0);
pl = pci_conf_read(&(sc->sc_pc), tag, PCIC_PTM1BAR);
la = pcil_bus_space_read_4(sc, PCIL_PTM1LA);
lm = pcil_bus_space_read_4(sc, PCIL_PTM1MS);
printf("1: %08lx -> %08lx,%08lx %s\n", pl, la, lm,
(lm & 1)?"enabled":"disabled");
pl = pci_conf_read(&(sc->sc_pc), tag, PCIC_PTM2BAR);
la = pcil_bus_space_read_4(sc, PCIL_PTM2LA);
lm = pcil_bus_space_read_4(sc, PCIL_PTM2MS);
printf("2: %08lx -> %08lx,%08lx %s\n", pl, la, lm,
(lm & 1)?"enabled":"disabled");
}
#endif
/*
* Machine-specific functions for PCI autoconfiguration.
*
* On PCs, there are two methods of generating PCI configuration cycles.
* We try to detect the appropriate mechanism for this machine and set
* up a few function pointers to access the correct method directly.
*
* The configuration method can be hard-coded in the config file by
* using `options PCI_CONF_MODE=N', where `N' is the configuration mode
* as defined section 3.6.4.1, `Generating Configuration Cycles'.
*/
void
pci_attach_hook(struct device *parent, struct device *self,
struct pcibus_attach_args *pba)
{
#if 0
struct pchb_softc *sc = (struct pchb_softc *)(pba->pba_pc.sc);
#ifdef PCI_CONFIGURE_VERBOSE
printf("pci_attach_hook\n");
show_pci_map(sc);
#endif
setup_pci(sc);
#ifdef PCI_CONFIGURE_VERBOSE
show_pci_map(sc);
#endif
#endif
}
int
pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
{
/*
* Bus number is irrelevant. Configuration Mechanism 1 is in
* use, can have devices 0-32 (i.e. the `normal' range).
*/
return 32;
}
pcitag_t
pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
{
pcitag_t tag;
if (bus >= 256 || device >= 32 || function >= 8)
panic("pci_make_tag: bad request");
/* XXX magic number */
tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
return tag;
}
void
pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp)
{
if (bp != NULL)
*bp = (tag >> 16) & 0xff;
if (dp != NULL)
*dp = (tag >> 11) & 0x1f;
if (fp != NULL)
*fp = (tag >> 8) & 0x07;
}
pcireg_t
pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
{
struct pchb_softc *sc = (struct pchb_softc *)(pc->sc);
pcireg_t data;
/* 405GT BIOS disables interrupts here. Should we? --Art */
bus_space_write_4(sc->sc_pcic_iot, sc->sc_pcic_ioh,
PCIC_CFGADDR, tag | reg);
data = bus_space_read_4(sc->sc_pcic_iot, sc->sc_pcic_ioh, PCIC_CFGDATA);
/* 405GP pass2 errata #6 */
bus_space_write_4(sc->sc_pcic_iot, sc->sc_pcic_ioh, PCIC_CFGADDR, 0);
return data;
}
void
pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
{
struct pchb_softc *sc = (struct pchb_softc *)(pc->sc);
bus_space_write_4(sc->sc_pcic_iot, sc->sc_pcic_ioh,
PCIC_CFGADDR, tag | reg);
bus_space_write_4(sc->sc_pcic_iot, sc->sc_pcic_ioh, PCIC_CFGDATA, data);
/* 405GP pass2 errata #6 */
bus_space_write_4(sc->sc_pcic_iot, sc->sc_pcic_ioh, PCIC_CFGADDR, 0);
}
const char *
pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
{
static char irqstr[8]; /* 4 + 2 + NUL + sanity */
if (ih == 0 || ih >= ICU_LEN)
panic("pci_intr_string: bogus handle 0x%x", ih);
sprintf(irqstr, "irq %d", ih);
return (irqstr);
}
const struct evcnt *
pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
{
/* XXX for now, no evcnt parent reported */
return NULL;
}
void *
pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
int (*func)(void *), void *arg)
{
if (ih == 0 || ih >= ICU_LEN)
panic("pci_intr_establish: bogus handle 0x%x", ih);
return intr_establish(ih, IST_LEVEL, level, func, arg);
}
void
pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
{
intr_disestablish(cookie);
}
/* Avoid overconfiguration */
int
pci_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func, pcireg_t id)
{
if ((PCI_VENDOR(id) == PCI_VENDOR_IBM
&& PCI_PRODUCT(id) == PCI_PRODUCT_IBM_405GP)
||
(PCI_VENDOR(id) == PCI_VENDOR_INTEL
&& PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_80960_RP)) {
/* Don't configure the bridge and PCI probe. */
return 0;
}
return PCI_CONF_DEFAULT;
}
/* $NetBSD$ */
/*
* Copyright (c) 2006 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed
* to The NetBSD Foundation, Inc.
* by Shigeyuki Fukushima.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _POWERPC_IBM4XX_DEV_PCHB_H_
#define _POWERPC_IBM4XX_DEV_PCHB_H_
#include <machine/bus.h>
struct ibm4xx_pci_config {
bus_addr_t pci_lowmem_base;
bus_addr_t pci_highmem_base;
struct powerpc_bus_space pchb_io_bust;
struct powerpc_bus_space pchb_mem_bust;
struct powerpc_bus_space pcic_bust;
struct powerpc_bus_space pcil_bust;
};
#endif /* !_POWERPC_IBM4XX_DEV_PCHB_H_ */
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