Subject: Re: Pegasos port freezes at uvm_km_alloc1
To: Frank Wille <frank@phoenix.owl.de>
From: Matt Thomas <matt@3am-software.com>
List: port-powerpc
Date: 12/07/2004 16:14:23
At 03:02 PM 12/7/2004, Frank Wille wrote:
>Matt Thomas wrote:
>
> > >Status: I get the copyright-message on screen, UVM is initialized,
> > > but the system freezes at the end of uvm_km_alloc1(), while trying to
> > > clear the first page of kernel memory with memset().
> >
> > Are the L1/L2/L3 caches enabled?
>
>I think they're not. Should I enable the L2 caches before
>cpu_attach()?
>
>BTW, where are the L1 caches enabled? I didn't find it in the
>source.
>
>It's a 750CXe system, so L3 caches will be no problem.

L1 is usually tuned on in locore before you transfer control
to initppc.


> > The heavy use dcbz with caches disabled might cause that.
>
>There is no dcbz involved. This memset() is using a simple stb.
>The system already freezes when I read the first byte of the
>page, instead of doing memset().
>
>
> > [..SRs..]
> > I would expect 5,6,7 to work fine.
>
>Ok. Will keep them unless the problem is sorted out.
>
>
> > What bats are you initializing?
>
>oea_batinit(0) should setup a but for the first 256M of RAM.
>Nothing else... I think.

That's your problem.  oea_batinit should only get I/O bats.
It'll init the BATs needed to address physical RAM (including 0)
by itself.


-- 
Matt Thomas                     email: matt@3am-software.com
3am Software Foundry              www: http://3am-software.com/bio/matt/
Cupertino, CA              disclaimer: I avow all knowledge of this message.