Subject: Re: Performance Monitoring Capabilities in PowerPC (PMC
To: Dheeraj Pandey <email@example.com>
From: Matt Thomas <firstname.lastname@example.org>
Date: 02/06/2003 16:58:45
At 04:44 PM 2/6/2003, Dheeraj Pandey wrote:
>I intend to get some iCache/dCache stats using the PMC capabilities of
>MPC750 (MMCR0/1 and PMCn registers, using mfspr and mtspr instructions).
>I went on to add some helper functions to set and get PMC[2,3] counters on
>MPC750, until I realized that there are pmc_control() and pmc_get_info()
>system calls for the same. There were no man pages for this, and I realized
>that these system calls will only function if the kernel is built with
>PERFCTRS. In fact, the pmc_xxx() helper functions for powerpc don't seem to
>be defined at all-- or at least I can't find it in the source. Allen Briggs
>seems to have done this work for Intel XScale, but I am not sure if this
>work was ever completed for PowerPC platforms.
>Are these system calls (pmc_control and pmc_get_info) baked at all? If they
>are, are there any useful examples/docs to refer to? If not, do I just go
>ahead on the path of custom code to get/set PMC[2,3]? I am specifically
>interested in iCache/dCache misses etc., which seem to be captured in PMC2
>and PMC3 respectively.
pmc is used on arm (xscale) and i386. the pmc stuff has not yet been
defined for powerpc yet. We really do need it for powerpc and we should
figure which of the PMC counter we should support.
Matt Thomas Internet: email@example.com
3am Software Foundry WWW URL: http://www.3am-software.com/bio/matt/
Cupertino, CA Disclaimer: I avow all knowledge of this message