Subject: Re: bzero.S and assym.h (Re: CVS commit:
To: None <email@example.com>
From: Wolfgang Solfrank <firstname.lastname@example.org>
Date: 12/04/2001 14:45:38
> Since we do run on embedded PPC CPUs, and they can have different
> cache line sizes, we do need to support this *now*.
Huh? Would you care to explain on what embedded PPC CPUs we do run
currently? The only one I can see in our tree is the 405GP which
does have the same cache line size as the other PPC CPUs we support,
namely 32. And that one even needs a different kernel anyway.
ws@TooLs.DE Wolfgang Solfrank, TooLs GmbH +49-228-985800