Subject: Re: bzero.S and assym.h (Re: CVS commit: syssrc/sys/lib/libkern/arch/powerpc)
To: Wolfgang Solfrank <email@example.com>
From: Greg Lehey <firstname.lastname@example.org>
Date: 12/04/2001 11:06:21
On Monday, 3 December 2001 at 21:14:24 +0100, Wolfgang Solfrank wrote:
> email@example.com wrote:
>>>> return sysctl_rdint(oldp, oldlenp, newp, CACHELINESIZE);
>> That needs to be changed too. The cache line size is not
>> necessarily fixed.
> Well, we don't currently support (officially) any ppc cpu that has a
> cache line size different from 32.
> That said, AFAICT, the only ppc cpus that currently exist with line
> sizes different from 32 are the embedded ones and the 64 bit ones.
> Now I may be totally out of my mind, but AFAICT both of those are in
> need of different kernels anyway.
No, that's not correct, at least for the 64 bit ones (POWER III, for
example). It's true that NetBSD currently doesn't run on this
processor, but the processor dependencies for running in 32 bit more
are relatively trivial. Linux/PPC-32 runs the same kernel on both 32
bit processors and POWER III.
In general the 60x range has 32 bytes cache lines, embedded processors
(40x and 80x) have 16 bytes, and the 64 bit processors have 128 byte
cache lines. There are exceptions, like the 405, which is a 64 bit
embedded processor and has 32 byte cache lines.
> At least for now, I don't see a need to support non-fixed cache line
> sizes in the kernel.
What do you mean by non-fixed? All processors have a fixed cache line
size. If you mean having a kernel which can handle different cache
line sizes, I think this is easy enough to achieve.
> If this changes, CACHELINESIZE could be easily changed to some
> variable, initialized early during startup, and used similar to what
> is done in userland.
Ah, yes, this would be easy enough to do.
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