Subject: pmap_zero_page()
To: None <>
From: Allen Briggs <>
List: port-powerpc
Date: 02/01/2001 14:59:38
arch/powerpc/powerpc/pmap.c defines pmap_zero_page() as:
        paddr_t pa;
#if 0
        bzero((caddr_t)pa, NBPG);
        int i;

        for (i = NBPG/CACHELINESIZE; i > 0; i--) {
                __asm __volatile ("dcbz 0,%0" :: "r"(pa));
                pa += CACHELINESIZE;

When I run with this code on a new port that I'm working on (CPU is
the MPC 8240, which has a 603e core), I get an alignment exception
during boot.  The `dcbz' instruction can generate this if the memory
referenced by the EA is in caching-inhibited or write-through mode.

Shouldn't we have the alignment exception handler zero the memory if
it trips for this?  Or is pmap_zero_page() supposed to always be called
on write-back-cached pages?


 Allen Briggs               Quality NetBSD CDs, Sales, Support, Service