I think that you are confusing alignment requirements with
performance optimizations.  PowerPC implementations operating in
big-endian mode do not require strict alignment.

	Any programmer who designs a data structure with small objects
first probably never took a course on data layout, probably does not
understand CPU architectures, and probably does not care about
performance.  There is a limit to how much a compiler should try to cover
up bad programming.

	GCC currently does not seem to have fine-enough granularity for
choosing optimal data movement instructions.  This current discussion
falls under the SLOW_UNALIGNED_ACCESS performance optimization heuristics,
not STRICT_ALIGNMENT correctness requirement.  This GCC heuristic needs
more flexibility to properly represent architectures like PowerPC.

David