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Re: Segments



Hi,

> Could someone please explain to me the rational behind how the
> Power{,PC,2} architecture handles segments? I've been studying both the
> Mindshare book, and the 601 manual (I haven't raided the Motorola document
> site recently :-(  ), and it seems "weird." They just seem to break up the
> memory space for little gain.

If you run a PowerXXX processor with memory management enabled, every memory
address gets translated.  Since you might have some large contiguous region
of memory that you want access to, segments allow this without loosing
any entries in the page table and/or the tlb cache.  Note that in order to
access device registers, you _have_ to enable memory management.

> Also, how does NetBSD, specifically macppc, handle segments?

I'm not 100% sure how NetBSD/macppc handles this, but I think that it didn't
change much from the NetBSD/ofppc (formerly NetBSD/powerpc) way of doing
things:

Basically, the segment registers are used to map all of the machines
address space 1:1.  (Since a segment register can map at most 256 MB and
you have only 4 of them (usable to access data), this mapping has to be
supported by a simple fault handler, but the assumption is, that you needn't
access to that many regions anyway).

The exception to this are two 256 MB regions.  It is assumed that there is
nothing behind these regions.

One of those two regions is mapped normally via the page table and is used
as kernel virtual memory.  That is, it's used to access memory that cannot
be accessed with its real address.  E.g. the disk buffers, or memory that
is malloc'ed within the kernel (this latter is due to the way kernel
malloc works).

The other region is used to access user memory.  I.e. the 256 MB region
of user memory the kernel needs access to is remapped into this region.

BTW, this latter thing implies that there is a difference between
NetBSD/powerpc and most other ports: with NetBSD/powerpc the kernel
doesn't occupy part of the available virtual address space, and thus
with NetBSD/powerpc user programs see the full 4 GB address space (to be
honest, the very last page isn't available to user programs.  This is due
to a bug in the vm system (at least the old mach vm, haven't had time to
look into uvm, but since it's using the same pmap interface, I suspect
it's the same in this respect)).

If you need more info, feel free to ask.

Ciao,
Wolfgang
-- 
ws%TooLs.DE@localhost     (Wolfgang Solfrank, TooLs GmbH)       +49-228-985800



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