Peter C. Wallace wrote:
> 
> Its actually a good design, all high speed local signals confined to the
> daughter-card, once the signals get on the main card, you probably have
> much longer signal lengths. 
> 

  Right.  Presumably there'd be no way for the MIPS bus itself to survive these
distances over connectors.
  So reverse engineering the ASIC isn't really necessary.  All that needs to be
done is fiure out the daughterboard/motherboard protocol and build a new ASIC
for the CPU of interest. :)

-- 
David Evans          (NeXTMail/MIME OK)             dfevans@bbcr.uwaterloo.ca
PhD Student, Computer/Synth Junkie         http://bbcr.uwaterloo.ca/~dfevans/
University of Waterloo         "Default is the value selected by the composer
Ontario, Canada           overridden by your command." - Roland TR-707 Manual