Subject: Re: PX/PXG and Neon project (beating the dead horse again)
To: Andy Doran <ad@fionn.sports.gov.uk>
From: Maciej W. Rozycki <macro@ds2.pg.gda.pl>
List: port-pmax
Date: 04/17/2000 17:41:08
On Mon, 17 Apr 2000, Andy Doran wrote:

> > i dunno.  the i960 is a pretty general purpose cpu.  
> 
> Nah. It's targeted towards controller applications - RAID, printers,
> toasters... Like, why would a general purpose CPU grok 248 separate 
> hardware interrupts? :)

 That's the way Intel designs hardware -- see their APIC architecture used
for i386/SMP systems -- it defines 240 hw interrupt sources (of which 16
are not recommended), although a given implementation might not have
enough physical IRQ lines.  Of course due to errata you cannot service
more than 60 distinct interrupts reliably (not that it is desired
commonly).  It's quite possible they exploit the very same APIC
architecture for i960 (I haven't checked, I admit)  especially as it's
their favourite -- they've already chosen it for IA-64. 

 BTW, the paging unit of the i860 is exactly the same as the one of the
i486. 

 I'm way off-topic here, I know...  Sorry.  Yet I believe someone might
find it useful.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +