Subject: Re: re^2: pmax interrupt problem solved
To: Terry R. Friedrichsen <terry@venus.sunquest.com>
From: Michael L. Hitch <mhitch@lightning.msu.montana.edu>
List: port-pmax
Date: 03/08/2000 11:12:47
On Wed, 8 Mar 2000, Terry R. Friedrichsen wrote:

> Michael Hitch wrote, regarding my patch:
> 
> > I had already commited a similar fix yesterday, but I'm going to change
> > it a bit now that I understand what the code was attempting to do.
> 
> Hmmm - my sup run at 1 a. m. didn't pick that up; I'll be anxious to see
> what you come up with.  I thought about getting fancier with the switch()
> statements, but since what I wrote was already faster than the existing
> code, I didn't bother.

  I've just commited a different fix for this, which should be available
in tomorrow's sup.

  Here's the diff from old, non-working version:

Index: dec_3max.c
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/pmax/pmax/dec_3max.c,v
retrieving revision 1.26
diff -u -r1.26 dec_3max.c
--- dec_3max.c	2000/03/06 03:13:36	1.26
+++ dec_3max.c	2000/03/08 17:58:01
@@ -235,7 +235,6 @@
 
 #define CALLINTR(vvv)						\
 	do {							\
-		ifound = 1;					\
 		intrcnt[vvv] += 1;				\
 		(*intrtab[vvv].ih_func)(intrtab[vvv].ih_arg);	\
 	} while (0)
@@ -278,29 +277,24 @@
 	_splset(MIPS_SR_INT_IE | (status & MIPS_INT_MASK_1));
 
 	if (cpumask & MIPS_INT_MASK_0) {
-                int ifound;
-
-                do {
-                        ifound = 0;
-                        csr = *(u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR);
-                        csr &= (csr >> KN02_CSR_IOINTEN_SHIFT);
-                        switch (csr & 0xf0) {
-                        case KN02_IP_DZ:
-                                CALLINTR(SYS_DEV_SCC0); break;
-                        case KN02_IP_LANCE:
-                                CALLINTR(SYS_DEV_LANCE); break;
-                        case KN02_IP_SCSI:
-                                CALLINTR(SYS_DEV_SCSI); break;
-                        }
-                        switch (csr & 0x0f) {
-                        case KN02_IP_SLOT2:
-                                CALLINTR(SYS_DEV_OPT2); break;
-                        case KN02_IP_SLOT1:
-                                CALLINTR(SYS_DEV_OPT1); break;
-                        case KN02_IP_SLOT0:
-                                CALLINTR(SYS_DEV_OPT0); break;
-                        }
-                } while (ifound);
+		csr = *(u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR);
+		csr &= (csr >> KN02_CSR_IOINTEN_SHIFT);
+		if (csr & (KN02_IP_DZ | KN02_IP_LANCE | KN02_IP_SCSI)) {
+			if (csr & KN02_IP_DZ)
+				CALLINTR(SYS_DEV_SCC0);
+			if (csr & KN02_IP_LANCE)
+				CALLINTR(SYS_DEV_LANCE);
+			if (csr & KN02_IP_SCSI)
+				CALLINTR(SYS_DEV_SCSI);
+		}
+		if (csr & (KN02_IP_SLOT2 | KN02_IP_SLOT1 | KN02_IP_SLOT0)) {
+			if (csr & KN02_IP_SLOT2)
+				CALLINTR(SYS_DEV_OPT2);
+			if (csr & KN02_IP_SLOT1)
+				CALLINTR(SYS_DEV_OPT1);
+			if (csr & KN02_IP_SLOT0)
+				CALLINTR(SYS_DEV_OPT0);
+		}
 	}
 	if (cpumask & MIPS_INT_MASK_3) {
 		intrcnt[ERROR_INTR]++;

--
Michael L. Hitch			mhitch@montana.edu
Computer Consultant
Information Technology Center
Montana State University	Bozeman, MT	USA