Subject: Re: -current TLB panics on 3100?
To: Toru Nishimura <nisimura@itc.aist-nara.ac.jp>
From: Michael L. Hitch <mhitch@lightning.msu.montana.edu>
List: port-pmax
Date: 11/09/1999 23:10:26
On Tue, 9 Nov 1999, Michael L. Hitch wrote:

> On Wed, 10 Nov 1999, Toru Nishimura wrote:
> 
> > I'll dispose the small scale 'enhancement' which is now proven harmful.

  It's quite nasty!

> > Whenever TLBmod exeception happens, TLB EntryHi register already has
> > the TLB high part in question.  I remember now that at that time I
> > expected TLB Index register already pointing the TLB entry brought the
> > exception, but later concluded 'tblp' instrunction was necessary. 
> > 
> > I managed to reproduce the panic at the exactly same location which
> > people reported, with very high load of 6-parallel make (-j 6) ran on
> > /usr/src/lib/libc.  Another theory is EntryHi register has been changed
> > when the 'tlbp' is about to be called.
> 
>   Um, what happens if you get a TLB miss between the TLB mod exception and
> the MachTLBUpdate()?

  I added some code to get the EnthryHi register before the TLBUpdate and
after the TLBUpdate.  Normally the values matched, but just before
crashing, I see a TLBmod exception where the EntryHi after the update
was different.  Dumping the TLB entries (DDB command "machine tlb") shows
that the EntryLo for the user address TLB contains the same EntryLo as the
kernel address TLB that matches the EntryHi after the update.  Definitely
not correct.

--
Michael L. Hitch			mhitch@montana.edu
Computer Consultant
Information Technology Center
Montana State University	Bozeman, MT	USA