yes, that's the problem bus_dma(9) is designed to handle.

The problem is: how can we implement bus_dma(9) for pmaxes which
handles the hardware requirements of these boards, which
are something like:

  a) "dma" buffer (for command packets) must be physically contiguous
  b) dma buffer must be in < first 8 Mbytes of RAM
  c) dma buffer must be mis-aligned to 32kbytes up from a 128k byte
     boundary.

iirc, b) and c) are due to a hardware design bug, where the address
lines were laid out incorrectly between the TC and the accelerator
hardware.

The hard one is (b). Andy's point is that we need to grab the memory
before it gets allocated to the buffer pool (and lost forevermore).
Either that, or add magic hooks to steal those physical pages back
from the buffer pool and replace them with other pages.

(The high-end TC alphas can work around this by using the TC-to-memory
mapping registers, but the low-end alphas have the same problem.)