Subject: Re: TLB weirdnesses
To: Michael L. Hitch <mhitch@lightning.oscs.montana.edu>
From: David Evans <dfevans@bbcr.uwaterloo.ca>
List: port-pmax
Date: 04/26/1998 14:16:09
Michael L. Hitch wrote:
> 
>   Take a look at mips_vector_init() - it explicitly flushes the random TLB
> entries.
> 

  So it does, you're right.

>   What exactly are the ktlbmiss messages?  The message should include the
> PC at the time of the exception, the RA [return address] location, and
> the bad address.
> 

  Yep.  Here it is, from a -current kernel sup'd yesterday with debugging
turned on (this is typed in, so some of the spacing may not be right):

root file system type: ffs
init: copying out flags `-s` 3
init: copying out path `/sbin/init' 11
ktlbmiss: PC 80124d70 RA 80120db8 ADR ffffbfe8
ST 2010 CR 3000000c SP ffffbfd0
TLB 0 vad 0xffffc000 0x004f9000 MG
TLB 1 vad 0xffffd000 0x004fa000 MG
TLB 2 vad 0xc3681000 0x004f9000 MG
TLV 3 vad 0xc3682000 0x004fa000 MG
panic: kernel stack overflow
Stopped at     _Debugger+0x94:    jr ra
db>

It looks from the above TLB entries that the kernel stack is supposed to start
at 0xffffc000 but something's been clobbered, causing stack access at the
errant address (0xffffbfe8).  I suppose I could try increasing the kernel stack
to 3 pages or so.
  The reason I don't think that it's hardware-related is that the machine works
fine under Ultrix.

-- 
David Evans          (NeXTMail/MIME OK)             dfevans@bbcr.uwaterloo.ca
Computer/Synth Junkie                      http://bbcr.uwaterloo.ca/~dfevans/
University of Waterloo         "Default is the value selected by the composer
Ontario, Canada           overridden by your command." - Roland TR-707 Manual