Subject: patches to NetBSD-Current (at 94/11/21) pmax/locore.s, pmax/fp.s
To: None <dean@fsa.ca>
From: Jonathan Stone <jonathan@DSG.Stanford.EDU>
List: port-pmax
Date: 11/22/1994 02:48:14
The following patches fix more inconsistent use (or non-use) of
underscores in kernel assembly source in src/sys/arch/pmax/locore.s
and src/sys/arch/pmax/fp.s. (Again, I believe these should be renamed
locore.S and fp.S; I'd renamed mine before creating these patches.).
I also restored the definition of ``__main()''; my gcc2 needs it.
The ld I put on Gregorio also doesn't generate symbols _edata and _etext;
usage of those names is still inconsistent.
*** 1.1 1994/11/21 22:40:59
--- locore.S 1994/11/22 10:34:26
***************
*** 98,104 ****
la sp, start - START_FRAME
# la gp, _gp
sw zero, START_FRAME - 4(sp) # Zero out old ra for debugger
! jal mach_init # mach_init(argc, argv, envp)
sw zero, START_FRAME - 8(sp) # Zero out old fp for debugger
li t0, MACH_SR_COP_1_BIT # Disable interrupts and
--- 98,104 ----
la sp, start - START_FRAME
# la gp, _gp
sw zero, START_FRAME - 4(sp) # Zero out old ra for debugger
! jal _mach_init # mach_init(argc, argv, envp)
sw zero, START_FRAME - 8(sp) # Zero out old fp for debugger
li t0, MACH_SR_COP_1_BIT # Disable interrupts and
***************
*** 106,114 ****
li sp, KERNELSTACK - START_FRAME # switch to standard stack
mfc0 t0, MACH_COP_0_PRID # read processor ID register
cfc1 t1, MACH_FPC_ID # read FPU ID register
! sw t0, cpu # save PRID register
! sw t1, fpu # save FPU ID register
! jal main # main(regs)
move a0, zero
/*
* proc[1] == /etc/init now running here.
--- 106,114 ----
li sp, KERNELSTACK - START_FRAME # switch to standard stack
mfc0 t0, MACH_COP_0_PRID # read processor ID register
cfc1 t1, MACH_FPC_ID # read FPU ID register
! sw t0, _cpu # save PRID register
! sw t1, _fpu # save FPU ID register
! jal _main # main(regs)
move a0, zero
/*
* proc[1] == /etc/init now running here.
***************
*** 161,174 ****
* (see sendsig() and sigreturn()). We have to compute the address
* of the sigcontext struct for the sigreturn call.
*/
! .globl sigcode
! sigcode:
addu a0, sp, 16 # address of sigcontext
li v0, SYS_sigreturn # sigreturn(scp)
syscall
break 0 # just in case sigreturn fails
! .globl esigcode
! esigcode:
/*
* Primitives
--- 161,174 ----
* (see sendsig() and sigreturn()). We have to compute the address
* of the sigcontext struct for the sigreturn call.
*/
! .globl _sigcode
! _sigcode:
addu a0, sp, 16 # address of sigcontext
li v0, SYS_sigreturn # sigreturn(scp)
syscall
break 0 # just in case sigreturn fails
! .globl _esigcode
! _esigcode:
/*
* Primitives
***************
*** 179,197 ****
* The reason for using this table rather than storing an address in
* u.u_pcb.pcb_onfault is simply to make the code faster.
*/
! .globl onfault_table
.data
.align 2
! onfault_table:
.word 0 # invalid index number
#define BADERR 1
.word baderr
#define COPYERR 2
! .word copyerr
#define FSWBERR 3
! .word fswberr
#define FSWINTRBERR 4
! .word fswintrberr
#ifdef KADB
#define KADBERR 5
.word kadberr
--- 179,197 ----
* The reason for using this table rather than storing an address in
* u.u_pcb.pcb_onfault is simply to make the code faster.
*/
! .globl _onfault_table
.data
.align 2
! _onfault_table:
.word 0 # invalid index number
#define BADERR 1
.word baderr
#define COPYERR 2
! .word _copyerr
#define FSWBERR 3
! .word _fswberr
#define FSWINTRBERR 4
! .word _fswintrberr
#ifdef KADB
#define KADBERR 5
.word kadberr
***************
*** 556,564 ****
subu sp, sp, STAND_FRAME_SIZE
.mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
sw ra, STAND_RA_OFFSET(sp)
! blt a0, zero, copyerr # make sure address is in user space
li v0, COPYERR
! jal copystr
sw v0, UADDR+U_PCB_ONFAULT
lw ra, STAND_RA_OFFSET(sp)
sw zero, UADDR+U_PCB_ONFAULT
--- 556,564 ----
subu sp, sp, STAND_FRAME_SIZE
.mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
sw ra, STAND_RA_OFFSET(sp)
! blt a0, zero, _copyerr # make sure address is in user space
li v0, COPYERR
! jal _copystr
sw v0, UADDR+U_PCB_ONFAULT
lw ra, STAND_RA_OFFSET(sp)
sw zero, UADDR+U_PCB_ONFAULT
***************
*** 581,589 ****
subu sp, sp, STAND_FRAME_SIZE
.mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
sw ra, STAND_RA_OFFSET(sp)
! blt a1, zero, copyerr # make sure address is in user space
li v0, COPYERR
! jal copystr
sw v0, UADDR+U_PCB_ONFAULT
lw ra, STAND_RA_OFFSET(sp)
sw zero, UADDR+U_PCB_ONFAULT
--- 581,589 ----
subu sp, sp, STAND_FRAME_SIZE
.mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
sw ra, STAND_RA_OFFSET(sp)
! blt a1, zero, _copyerr # make sure address is in user space
li v0, COPYERR
! jal _copystr
sw v0, UADDR+U_PCB_ONFAULT
lw ra, STAND_RA_OFFSET(sp)
sw zero, UADDR+U_PCB_ONFAULT
***************
*** 603,611 ****
subu sp, sp, STAND_FRAME_SIZE
.mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
sw ra, STAND_RA_OFFSET(sp)
! blt a0, zero, copyerr # make sure address is in user space
li v0, COPYERR
! jal bcopy
sw v0, UADDR+U_PCB_ONFAULT
lw ra, STAND_RA_OFFSET(sp)
sw zero, UADDR+U_PCB_ONFAULT
--- 603,611 ----
subu sp, sp, STAND_FRAME_SIZE
.mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
sw ra, STAND_RA_OFFSET(sp)
! blt a0, zero, _copyerr # make sure address is in user space
li v0, COPYERR
! jal _bcopy
sw v0, UADDR+U_PCB_ONFAULT
lw ra, STAND_RA_OFFSET(sp)
sw zero, UADDR+U_PCB_ONFAULT
***************
*** 625,633 ****
subu sp, sp, STAND_FRAME_SIZE
.mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
sw ra, STAND_RA_OFFSET(sp)
! blt a1, zero, copyerr # make sure address is in user space
li v0, COPYERR
! jal bcopy
sw v0, UADDR+U_PCB_ONFAULT
lw ra, STAND_RA_OFFSET(sp)
sw zero, UADDR+U_PCB_ONFAULT
--- 625,633 ----
subu sp, sp, STAND_FRAME_SIZE
.mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
sw ra, STAND_RA_OFFSET(sp)
! blt a1, zero, _copyerr # make sure address is in user space
li v0, COPYERR
! jal _bcopy
sw v0, UADDR+U_PCB_ONFAULT
lw ra, STAND_RA_OFFSET(sp)
sw zero, UADDR+U_PCB_ONFAULT
***************
*** 786,797 ****
li t1, 1 # compute corresponding bit
srl t0, t0, 2 # compute index into 'whichqs'
sll t1, t1, t0
! lw t2, whichqs # set corresponding bit
nop
or t2, t2, t1
! sw t2, whichqs
sll t0, t0, 3 # compute index into 'qs'
! la t1, qs
addu t0, t0, t1 # t0 = qp = &qs[pri >> 2]
lw t1, P_BACK(t0) # t1 = qp->ph_rlink
sw t0, P_FORW(a0) # p->p_forw = qp
--- 786,797 ----
li t1, 1 # compute corresponding bit
srl t0, t0, 2 # compute index into 'whichqs'
sll t1, t1, t0
! lw t2, _whichqs # set corresponding bit
nop
or t2, t2, t1
! sw t2, _whichqs
sll t0, t0, 3 # compute index into 'qs'
! la t1, _qs
addu t0, t0, t1 # t0 = qp = &qs[pri >> 2]
lw t1, P_BACK(t0) # t1 = qp->ph_rlink
sw t0, P_FORW(a0) # p->p_forw = qp
***************
*** 813,819 ****
lbu t0, P_PRIORITY(a0) # get from p->p_priority / 4 queue
li t1, 1 # compute corresponding bit
srl t0, t0, 2 # compute index into 'whichqs'
! lw t2, whichqs # check corresponding bit
sll t1, t1, t0
and v0, t2, t1
sw ra, STAND_RA_OFFSET(sp) ##
--- 813,819 ----
lbu t0, P_PRIORITY(a0) # get from p->p_priority / 4 queue
li t1, 1 # compute corresponding bit
srl t0, t0, 2 # compute index into 'whichqs'
! lw t2, _whichqs # check corresponding bit
sll t1, t1, t0
and v0, t2, t1
sw ra, STAND_RA_OFFSET(sp) ##
***************
*** 826,832 ****
sw v1, P_FORW(v0) # p->p_back->p_forw = p->p_forw;
sw v0, P_BACK(v1) # p->p_forw->p_back = p->r_rlink
sll t0, t0, 3 # compute index into 'qs'
! la v0, qs
addu t0, t0, v0 # t0 = qp = &qs[pri >> 2]
lw v0, P_FORW(t0) # check if queue empty
nop
--- 826,832 ----
sw v1, P_FORW(v0) # p->p_back->p_forw = p->p_forw;
sw v0, P_BACK(v1) # p->p_forw->p_back = p->r_rlink
sll t0, t0, 3 # compute index into 'qs'
! la v0, _qs
addu t0, t0, v0 # t0 = qp = &qs[pri >> 2]
lw v0, P_FORW(t0) # check if queue empty
nop
***************
*** 833,839 ****
bne v0, t0, 2f # No. qp->ph_link != qp
nop
xor t2, t2, t1 # clear corresponding bit in 'whichqs'
! sw t2, whichqs
2:
sw zero, P_BACK(a0) ## for firewall checking
j ra
--- 833,839 ----
bne v0, t0, 2f # No. qp->ph_link != qp
nop
xor t2, t2, t1 # clear corresponding bit in 'whichqs'
! sw t2, _whichqs
2:
sw zero, P_BACK(a0) ## for firewall checking
j ra
***************
*** 849,855 ****
* All interrupts should be blocked at this point.
*/
LEAF(_switch_exit)
! la v1, nullproc # save state into garbage proc
lw t0, P_UPTE+0(v1) # t0 = first u. pte
lw t1, P_UPTE+4(v1) # t1 = 2nd u. pte
li v0, UADDR # v0 = first HI entry
--- 849,855 ----
* All interrupts should be blocked at this point.
*/
LEAF(_switch_exit)
! la v1, _nullproc # save state into garbage proc
lw t0, P_UPTE+0(v1) # t0 = first u. pte
lw t1, P_UPTE+4(v1) # t1 = 2nd u. pte
li v0, UADDR # v0 = first HI entry
***************
*** 862,870 ****
mtc0 t0, MACH_COP_0_TLB_INDEX # set the index register
mtc0 v0, MACH_COP_0_TLB_HI # init high entry
mtc0 t1, MACH_COP_0_TLB_LOW # init low entry
! sw zero, curproc
tlbwi # Write the TLB entry.
! b cpu_switch
li sp, KERNELSTACK - START_FRAME # switch to standard stack
END(_switch_exit)
--- 862,870 ----
mtc0 t0, MACH_COP_0_TLB_INDEX # set the index register
mtc0 v0, MACH_COP_0_TLB_HI # init high entry
mtc0 t1, MACH_COP_0_TLB_LOW # init low entry
! sw zero, _curproc
tlbwi # Write the TLB entry.
! b _cpu_switch
li sp, KERNELSTACK - START_FRAME # switch to standard stack
END(_switch_exit)
***************
*** 877,885 ****
LEAF(_idle)
li t0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR)
mtc0 t0, MACH_COP_0_STATUS_REG # enable all interrupts
! sw zero, curproc # set curproc NULL for stats
1:
! lw t0, whichqs # look for non-empty queue
nop
beq t0, zero, 1b
nop
--- 877,885 ----
LEAF(_idle)
li t0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR)
mtc0 t0, MACH_COP_0_STATUS_REG # enable all interrupts
! sw zero, _curproc # set curproc NULL for stats
1:
! lw t0, _whichqs # look for non-empty queue
nop
beq t0, zero, 1b
nop
***************
*** 896,903 ****
subu sp, sp, STAND_FRAME_SIZE
sw ra, STAND_RA_OFFSET(sp)
.mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
! lw t2, cnt+V_SWTCH # for statistics
! lw t1, whichqs # look for non-empty queue
sw s0, UADDR+U_PCB_CONTEXT+0 # do a 'savectx()'
sw s1, UADDR+U_PCB_CONTEXT+4
sw s2, UADDR+U_PCB_CONTEXT+8
--- 896,903 ----
subu sp, sp, STAND_FRAME_SIZE
sw ra, STAND_RA_OFFSET(sp)
.mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
! lw t2, _cnt+V_SWTCH # for statistics
! lw t1, _whichqs # look for non-empty queue
sw s0, UADDR+U_PCB_CONTEXT+0 # do a 'savectx()'
sw s1, UADDR+U_PCB_CONTEXT+4
sw s2, UADDR+U_PCB_CONTEXT+8
***************
*** 911,925 ****
sw ra, UADDR+U_PCB_CONTEXT+40 # save return address
sw t0, UADDR+U_PCB_CONTEXT+44 # save status register
addu t2, t2, 1
! sw t2, cnt+V_SWTCH
! beq t1, zero, idle # if none, idle
mtc0 zero, MACH_COP_0_STATUS_REG # Disable all interrupts
sw1:
nop # wait for intrs disabled
nop
! lw t0, whichqs # look for non-empty queue
li t2, -1 # t2 = lowest bit set
! beq t0, zero, idle # if none, idle
move t3, t0 # t3 = saved whichqs
1:
addu t2, t2, 1
--- 911,925 ----
sw ra, UADDR+U_PCB_CONTEXT+40 # save return address
sw t0, UADDR+U_PCB_CONTEXT+44 # save status register
addu t2, t2, 1
! sw t2, _cnt+V_SWTCH
! beq t1, zero, _idle # if none, idle
mtc0 zero, MACH_COP_0_STATUS_REG # Disable all interrupts
sw1:
nop # wait for intrs disabled
nop
! lw t0, _whichqs # look for non-empty queue
li t2, -1 # t2 = lowest bit set
! beq t0, zero, _idle # if none, idle
move t3, t0 # t3 = saved whichqs
1:
addu t2, t2, 1
***************
*** 930,936 ****
* Remove process from queue.
*/
sll t0, t2, 3
! la t1, qs
addu t0, t0, t1 # t0 = qp = &qs[highbit]
lw a0, P_FORW(t0) # a0 = p = highest pri process
nop
--- 930,936 ----
* Remove process from queue.
*/
sll t0, t2, 3
! la t1, _qs
addu t0, t0, t1 # t0 = qp = &qs[highbit]
lw a0, P_FORW(t0) # a0 = p = highest pri process
nop
***************
*** 945,959 ****
li v1, 1 # compute bit in 'whichqs'
sll v1, v1, t2
xor t3, t3, v1 # clear bit in 'whichqs'
! sw t3, whichqs
3:
/*
* Switch to new context.
*/
! sw zero, want_resched
! jal pmap_alloc_tlbpid # v0 = TLB PID
move s0, a0 # BDSLOT: save p
! sw s0, curproc # set curproc
sll v0, v0, VMMACH_TLB_PID_SHIFT # v0 = aligned PID
lw t0, P_UPTE+0(s0) # t0 = first u. pte
lw t1, P_UPTE+4(s0) # t1 = 2nd u. pte
--- 945,959 ----
li v1, 1 # compute bit in 'whichqs'
sll v1, v1, t2
xor t3, t3, v1 # clear bit in 'whichqs'
! sw t3, _whichqs
3:
/*
* Switch to new context.
*/
! sw zero, _want_resched
! jal _pmap_alloc_tlbpid # v0 = TLB PID
move s0, a0 # BDSLOT: save p
! sw s0, _curproc # set curproc
sll v0, v0, VMMACH_TLB_PID_SHIFT # v0 = aligned PID
lw t0, P_UPTE+0(s0) # t0 = first u. pte
lw t1, P_UPTE+4(s0) # t1 = 2nd u. pte
***************
*** 1003,1009 ****
*/
LEAF(_fuword)
ALEAF(_fuiword)
! blt a0, zero, fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
lw v0, 0(a0) # fetch word
--- 1003,1009 ----
*/
LEAF(_fuword)
ALEAF(_fuiword)
! blt a0, zero, _fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
lw v0, 0(a0) # fetch word
***************
*** 1013,1019 ****
LEAF(_fusword)
ALEAF(_fuisword)
! blt a0, zero, fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
lhu v0, 0(a0) # fetch short
--- 1013,1019 ----
LEAF(_fusword)
ALEAF(_fuisword)
! blt a0, zero, _fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
lhu v0, 0(a0) # fetch short
***************
*** 1023,1029 ****
LEAF(_fubyte)
ALEAF(_fuibyte)
! blt a0, zero, fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
lbu v0, 0(a0) # fetch byte
--- 1023,1029 ----
LEAF(_fubyte)
ALEAF(_fuibyte)
! blt a0, zero, _fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
lbu v0, 0(a0) # fetch byte
***************
*** 1032,1038 ****
END(_fubyte)
LEAF(_suword)
! blt a0, zero, fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
sw a1, 0(a0) # store word
--- 1032,1038 ----
END(_fubyte)
LEAF(_suword)
! blt a0, zero, _fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
sw a1, 0(a0) # store word
***************
*** 1045,1057 ****
* Have to flush instruction cache afterwards.
*/
LEAF(_suiword)
! blt a0, zero, fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
sw a1, 0(a0) # store word
sw zero, UADDR+U_PCB_ONFAULT
move v0, zero
! b MachFlushICache # NOTE: this should not clobber v0!
li a1, 4 # size of word
END(_suiword)
--- 1045,1057 ----
* Have to flush instruction cache afterwards.
*/
LEAF(_suiword)
! blt a0, zero, _fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
sw a1, 0(a0) # store word
sw zero, UADDR+U_PCB_ONFAULT
move v0, zero
! b _MachFlushICache # NOTE: this should not clobber v0!
li a1, 4 # size of word
END(_suiword)
***************
*** 1060,1066 ****
*/
LEAF(_susword)
ALEAF(_suisword)
! blt a0, zero, fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
sh a1, 0(a0) # store short
--- 1060,1066 ----
*/
LEAF(_susword)
ALEAF(_suisword)
! blt a0, zero, _fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
sh a1, 0(a0) # store short
***************
*** 1071,1077 ****
LEAF(_subyte)
ALEAF(_suibyte)
! blt a0, zero, fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
sb a1, 0(a0) # store byte
--- 1071,1077 ----
LEAF(_subyte)
ALEAF(_suibyte)
! blt a0, zero, _fswberr # make sure address is in user space
li v0, FSWBERR
sw v0, UADDR+U_PCB_ONFAULT
sb a1, 0(a0) # store byte
***************
*** 1091,1097 ****
* The important thing is to prevent sleep() and switch().
*/
LEAF(_fuswintr)
! blt a0, zero, fswintrberr # make sure address is in user space
li v0, FSWINTRBERR
sw v0, UADDR+U_PCB_ONFAULT
lhu v0, 0(a0) # fetch short
--- 1091,1097 ----
* The important thing is to prevent sleep() and switch().
*/
LEAF(_fuswintr)
! blt a0, zero, _fswintrberr # make sure address is in user space
li v0, FSWINTRBERR
sw v0, UADDR+U_PCB_ONFAULT
lhu v0, 0(a0) # fetch short
***************
*** 1100,1106 ****
END(_fuswintr)
LEAF(_suswintr)
! blt a0, zero, fswintrberr # make sure address is in user space
li v0, FSWINTRBERR
sw v0, UADDR+U_PCB_ONFAULT
sh a1, 0(a0) # store short
--- 1100,1106 ----
END(_fuswintr)
LEAF(_suswintr)
! blt a0, zero, _fswintrberr # make sure address is in user space
li v0, FSWINTRBERR
sw v0, UADDR+U_PCB_ONFAULT
sh a1, 0(a0) # store short
***************
*** 1147,1154 ****
* handle user level TLB translation misses.
* NOTE: This code must be relocatable!!!
*/
! .globl MachUTLBMiss
! MachUTLBMiss:
.set noat
mfc0 k0, MACH_COP_0_BAD_VADDR # get the virtual address
lw k1, UADDR+U_PCB_SEGTAB # get the current segment table
--- 1147,1154 ----
* handle user level TLB translation misses.
* NOTE: This code must be relocatable!!!
*/
! .globl _MachUTLBMiss
! _MachUTLBMiss:
.set noat
mfc0 k0, MACH_COP_0_BAD_VADDR # get the virtual address
lw k1, UADDR+U_PCB_SEGTAB # get the current segment table
***************
*** 1179,1194 ****
j SlowFault # handle the rest
nop
.set at
! .globl MachUTLBMissEnd
! MachUTLBMissEnd:
/*
* This code is copied to the general exception vector address to
* handle all execptions except RESET and UTLBMiss.
* NOTE: This code must be relocatable!!!
*/
! .globl MachException
! MachException:
/*
* Find out what mode we came from and jump to the proper handler.
*/
--- 1179,1202 ----
j SlowFault # handle the rest
nop
.set at
! .globl _MachUTLBMissEnd
! _MachUTLBMissEnd:
/*
+ * GCC2 seems to want to call __main in main() for some reason.
+ */
+ LEAF(___main)
+ j ra
+ nop
+ END(___main)
+
+ /*
* This code is copied to the general exception vector address to
* handle all execptions except RESET and UTLBMiss.
* NOTE: This code must be relocatable!!!
*/
! .globl _MachException
! _MachException:
/*
* Find out what mode we came from and jump to the proper handler.
*/
***************
*** 1200,1206 ****
and k1, k1, MACH_CR_EXC_CODE # Mask out the cause bits.
or k1, k1, k0 # change index to user table
1:
! la k0, machExceptionTable # get base of the jump table
addu k0, k0, k1 # Get the address of the
# function entry. Note that
# the cause is already
--- 1208,1214 ----
and k1, k1, MACH_CR_EXC_CODE # Mask out the cause bits.
or k1, k1, k0 # change index to user table
1:
! la k0, _machExceptionTable # get base of the jump table
addu k0, k0, k1 # Get the address of the
# function entry. Note that
# the cause is already
***************
*** 1211,1218 ****
j k0 # Jump to the function.
nop
.set at
! .globl MachExceptionEnd
! MachExceptionEnd:
/*
* We couldn't find a TLB entry.
--- 1219,1226 ----
j k0 # Jump to the function.
nop
.set at
! .globl _MachExceptionEnd
! _MachExceptionEnd:
/*
* We couldn't find a TLB entry.
***************
*** 1223,1229 ****
mfc0 k0, MACH_COP_0_STATUS_REG
nop
and k0, k0, MACH_SR_KU_PREV
! bne k0, zero, MachUserGenException
nop
.set at
/*
--- 1231,1237 ----
mfc0 k0, MACH_COP_0_STATUS_REG
nop
and k0, k0, MACH_SR_KU_PREV
! bne k0, zero, _MachUserGenException
nop
.set at
/*
***************
*** 1310,1316 ****
/*
* Call the exception handler.
*/
! jal trap
sw a3, STAND_RA_OFFSET(sp) # for debugging
/*
* Restore registers and return from the exception.
--- 1318,1324 ----
/*
* Call the exception handler.
*/
! jal _trap
sw a3, STAND_RA_OFFSET(sp) # for debugging
/*
* Restore registers and return from the exception.
***************
*** 1415,1421 ****
/*
* Call the exception handler.
*/
! jal trap
mtc0 t0, MACH_COP_0_STATUS_REG
/*
* Restore user registers and return. NOTE: interrupts are enabled.
--- 1423,1429 ----
/*
* Call the exception handler.
*/
! jal _trap
mtc0 t0, MACH_COP_0_STATUS_REG
/*
* Restore user registers and return. NOTE: interrupts are enabled.
***************
*** 1521,1527 ****
/*
* Call the interrupt handler.
*/
! jal interrupt
sw a2, STAND_RA_OFFSET(sp) # for debugging
/*
* Restore registers and return from the interrupt.
--- 1529,1535 ----
/*
* Call the interrupt handler.
*/
! jal _interrupt
sw a2, STAND_RA_OFFSET(sp) # for debugging
/*
* Restore registers and return from the interrupt.
***************
*** 1622,1634 ****
/*
* Call the interrupt handler.
*/
! jal interrupt
sw a2, STAND_RA_OFFSET(sp) # for debugging
/*
* Restore registers and return from the interrupt.
*/
lw a0, UADDR+U_PCB_REGS+(SR * 4)
! lw v0, astpending # any pending interrupts?
mtc0 a0, MACH_COP_0_STATUS_REG # Restore the SR, disable intrs
bne v0, zero, 1f # dont restore, call softintr
lw t0, UADDR+U_PCB_REGS+(MULLO * 4)
--- 1630,1642 ----
/*
* Call the interrupt handler.
*/
! jal _interrupt
sw a2, STAND_RA_OFFSET(sp) # for debugging
/*
* Restore registers and return from the interrupt.
*/
lw a0, UADDR+U_PCB_REGS+(SR * 4)
! lw v0, _astpending # any pending interrupts?
mtc0 a0, MACH_COP_0_STATUS_REG # Restore the SR, disable intrs
bne v0, zero, 1f # dont restore, call softintr
lw t0, UADDR+U_PCB_REGS+(MULLO * 4)
***************
*** 1676,1682 ****
/*
* Call the software interrupt handler.
*/
! jal softintr
mtc0 t0, MACH_COP_0_STATUS_REG # enable interrupts (spl0)
/*
* Restore user registers and return. NOTE: interrupts are enabled.
--- 1684,1690 ----
/*
* Call the software interrupt handler.
*/
! jal _softintr
mtc0 t0, MACH_COP_0_STATUS_REG # enable interrupts (spl0)
/*
* Restore user registers and return. NOTE: interrupts are enabled.
***************
*** 1787,1798 ****
mfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address
li k1, VM_MIN_KERNEL_ADDRESS # compute index
subu k0, k0, k1
! lw k1, Sysmapsize # index within range?
srl k0, k0, PGSHIFT
sltu k1, k0, k1
beq k1, zero, 1f # No. check for valid stack
nop
! lw k1, Sysmap
sll k0, k0, 2 # compute offset from index
addu k1, k1, k0
lw k0, 0(k1) # get PTE entry
--- 1795,1806 ----
mfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address
li k1, VM_MIN_KERNEL_ADDRESS # compute index
subu k0, k0, k1
! lw k1, _Sysmapsize # index within range?
srl k0, k0, PGSHIFT
sltu k1, k0, k1
beq k1, zero, 1f # No. check for valid stack
nop
! lw k1, _Sysmap
sll k0, k0, 2 # compute offset from index
addu k1, k1, k0
lw k0, 0(k1) # get PTE entry
***************
*** 1799,1805 ****
mfc0 k1, MACH_COP_0_EXC_PC # get return address
mtc0 k0, MACH_COP_0_TLB_LOW # save PTE entry
and k0, k0, PG_V # check for valid entry
! beq k0, zero, MachKernGenException # PTE invalid
nop
tlbwr # update TLB
j k1
--- 1807,1813 ----
mfc0 k1, MACH_COP_0_EXC_PC # get return address
mtc0 k0, MACH_COP_0_TLB_LOW # save PTE entry
and k0, k0, PG_V # check for valid entry
! beq k0, zero, _MachKernGenException # PTE invalid
nop
tlbwr # update TLB
j k1
***************
*** 1808,1814 ****
1:
subu k0, sp, UADDR + 0x200 # check to see if we have a
sltiu k0, UPAGES*NBPG - 0x200 # valid kernel stack
! bne k0, zero, MachKernGenException # Go panic
nop
la a0, start - START_FRAME - 8 # set sp to a valid place
--- 1816,1822 ----
1:
subu k0, sp, UADDR + 0x200 # check to see if we have a
sltiu k0, UPAGES*NBPG - 0x200 # valid kernel stack
! bne k0, zero, _MachKernGenException # Go panic
nop
la a0, start - START_FRAME - 8 # set sp to a valid place
***************
*** 1822,1828 ****
sw a3, 20(sp)
sw sp, 24(sp)
move a2, ra
! jal printf
mfc0 a3, MACH_COP_0_BAD_VADDR
.data
1:
--- 1830,1836 ----
sw a3, 20(sp)
sw sp, 24(sp)
move a2, ra
! jal _printf
mfc0 a3, MACH_COP_0_BAD_VADDR
.data
1:
***************
*** 2517,2523 ****
mfc0 t1, MACH_COP_0_STATUS_REG # Disable interrupts and
li t0, MACH_SR_COP_1_BIT # enable the coprocessor
mtc0 t0, MACH_COP_0_STATUS_REG
! sw zero, machFPCurProcPtr # indicate state has been saved
/*
* First read out the status register to make sure that all FP operations
* have completed.
--- 2525,2531 ----
mfc0 t1, MACH_COP_0_STATUS_REG # Disable interrupts and
li t0, MACH_SR_COP_1_BIT # enable the coprocessor
mtc0 t0, MACH_COP_0_STATUS_REG
! sw zero, _machFPCurProcPtr # indicate state has been saved
/*
* First read out the status register to make sure that all FP operations
* have completed.
***************
*** 2619,2625 ****
li a0, UADDR+U_PCB_REGS # first arg is ptr to CPU registers
move a1, a2 # second arg is instruction PC
move a2, t1 # third arg is floating point CSR
! jal MachEmulateBranch # compute PC after branch
move a3, zero # fourth arg is FALSE
/*
* Now load the floating-point instruction in the branch delay slot
--- 2627,2633 ----
li a0, UADDR+U_PCB_REGS # first arg is ptr to CPU registers
move a1, a2 # second arg is instruction PC
move a2, t1 # third arg is floating point CSR
! jal _MachEmulateBranch # compute PC after branch
move a3, zero # fourth arg is FALSE
/*
* Now load the floating-point instruction in the branch delay slot
***************
*** 2647,2656 ****
* Send a floating point exception signal to the current process.
*/
3:
! lw a0, curproc # get current process
cfc1 a2, MACH_FPC_CSR # code = FP execptions
ctc1 zero, MACH_FPC_CSR # Clear exceptions
! jal trapsignal
li a1, SIGFPE
b FPReturn
nop
--- 2655,2664 ----
* Send a floating point exception signal to the current process.
*/
3:
! lw a0, _curproc # get current process
cfc1 a2, MACH_FPC_CSR # code = FP execptions
ctc1 zero, MACH_FPC_CSR # Clear exceptions
! jal _trapsignal
li a1, SIGFPE
b FPReturn
nop
***************
*** 2659,2665 ****
* Finally, we can call MachEmulateFP() where a0 is the instruction to emulate.
*/
4:
! jal MachEmulateFP
nop
/*
--- 2667,2673 ----
* Finally, we can call MachEmulateFP() where a0 is the instruction to emulate.
*/
4:
! jal _MachEmulateFP
nop
/*
***************
*** 2705,2713 ****
* linker still thinks SizeCache is in the cached region so it computes
* the correct address without complaining.
*/
! jal SizeCache # Get the size of the d-cache.
nop
! sw v0, machDataCacheSize
nop # Make sure sw out of pipe
nop
nop
--- 2713,2721 ----
* linker still thinks SizeCache is in the cached region so it computes
* the correct address without complaining.
*/
! jal _SizeCache # Get the size of the d-cache.
nop
! sw v0, _machDataCacheSize
nop # Make sure sw out of pipe
nop
nop
***************
*** 2718,2724 ****
nop
nop
nop
! jal SizeCache # Get the size of the i-cache.
nop
mtc0 zero, MACH_COP_0_STATUS_REG # Swap back caches and enable.
nop
--- 2726,2732 ----
nop
nop
nop
! jal _SizeCache # Get the size of the i-cache.
nop
mtc0 zero, MACH_COP_0_STATUS_REG # Swap back caches and enable.
nop
***************
*** 2725,2731 ****
nop
nop
nop
! sw v0, machInstCacheSize
la t0, 1f
j t0 # Back to cached mode
nop
--- 2733,2739 ----
nop
nop
nop
! sw v0, _machInstCacheSize
la t0, 1f
j t0 # Back to cached mode
nop
***************
*** 2809,2816 ****
*----------------------------------------------------------------------------
*/
LEAF(_MachFlushCache)
! lw t1, machInstCacheSize # Must load before isolating
! lw t2, machDataCacheSize # Must load before isolating
mfc0 t3, MACH_COP_0_STATUS_REG # Save the status register.
mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts.
la v0, 1f
--- 2817,2824 ----
*----------------------------------------------------------------------------
*/
LEAF(_MachFlushCache)
! lw t1, _machInstCacheSize # Must load before isolating
! lw t2, _machDataCacheSize # Must load before isolating
mfc0 t3, MACH_COP_0_STATUS_REG # Save the status register.
mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts.
la v0, 1f
*** 1.1 1994/11/21 22:40:56
--- fp.S 1994/11/22 10:14:48
***************
*** 2267,2273 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_get_fs_int)
srl a3, a0, 12 - 2 # get FS field (even regs only)
and a3, a3, 0xF << 2 # mask FS field
lw a3, get_fs_int_tbl(a3) # switch on register number
--- 2267,2273 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(get_fs_int)
srl a3, a0, 12 - 2 # get FS field (even regs only)
and a3, a3, 0xF << 2 # mask FS field
lw a3, get_fs_int_tbl(a3) # switch on register number
***************
*** 2346,2352 ****
negu t2
1:
j ra
! END(_get_fs_int)
/*----------------------------------------------------------------------------
* get_ft_fs_s --
--- 2346,2352 ----
negu t2
1:
j ra
! END(get_fs_int)
/*----------------------------------------------------------------------------
* get_ft_fs_s --
***************
*** 2365,2371 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_get_ft_fs_s)
srl a3, a0, 17 - 2 # get FT field (even regs only)
and a3, a3, 0xF << 2 # mask FT field
lw a3, get_ft_s_tbl(a3) # switch on register number
--- 2365,2371 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(get_ft_fs_s)
srl a3, a0, 17 - 2 # get FT field (even regs only)
and a3, a3, 0xF << 2 # mask FT field
lw a3, get_ft_s_tbl(a3) # switch on register number
***************
*** 2463,2469 ****
*
*----------------------------------------------------------------------------
*/
! ALEAF(_get_fs_s)
srl a3, a0, 12 - 2 # get FS field (even regs only)
and a3, a3, 0xF << 2 # mask FS field
lw a3, get_fs_s_tbl(a3) # switch on register number
--- 2463,2469 ----
*
*----------------------------------------------------------------------------
*/
! ALEAF(get_fs_s)
srl a3, a0, 12 - 2 # get FS field (even regs only)
and a3, a3, 0xF << 2 # mask FS field
lw a3, get_fs_s_tbl(a3) # switch on register number
***************
*** 2546,2552 ****
bne v0, zero, invalid_s
1:
j ra
! END(_get_ft_fs_s)
/*----------------------------------------------------------------------------
* get_ft_fs_d --
--- 2546,2552 ----
bne v0, zero, invalid_s
1:
j ra
! END(get_ft_fs_s)
/*----------------------------------------------------------------------------
* get_ft_fs_d --
***************
*** 2567,2573 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_get_ft_fs_d)
srl a3, a0, 17 - 2 # get FT field (even regs only)
and a3, a3, 0xF << 2 # mask FT field
lw a3, get_ft_d_tbl(a3) # switch on register number
--- 2567,2573 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(get_ft_fs_d)
srl a3, a0, 17 - 2 # get FT field (even regs only)
and a3, a3, 0xF << 2 # mask FT field
lw a3, get_ft_d_tbl(a3) # switch on register number
***************
*** 2682,2688 ****
*
*----------------------------------------------------------------------------
*/
! ALEAF(_get_fs_d)
srl a3, a0, 12 - 2 # get FS field (even regs only)
and a3, a3, 0xF << 2 # mask FS field
lw a3, get_fs_d_tbl(a3) # switch on register number
--- 2682,2688 ----
*
*----------------------------------------------------------------------------
*/
! ALEAF(get_fs_d)
srl a3, a0, 12 - 2 # get FS field (even regs only)
and a3, a3, 0xF << 2 # mask FS field
lw a3, get_fs_d_tbl(a3) # switch on register number
***************
*** 2781,2787 ****
bne v0, zero, invalid_d
1:
j ra
! END(_get_ft_fs_d)
/*----------------------------------------------------------------------------
* get_cmp_s --
--- 2781,2787 ----
bne v0, zero, invalid_d
1:
j ra
! END(get_ft_fs_d)
/*----------------------------------------------------------------------------
* get_cmp_s --
***************
*** 2800,2806 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_get_cmp_s)
srl a3, a0, 12 - 2 # get FS field (even regs only)
and a3, a3, 0xF << 2 # mask FS field
lw a3, cmp_fs_s_tbl(a3) # switch on register number
--- 2800,2806 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(get_cmp_s)
srl a3, a0, 12 - 2 # get FS field (even regs only)
and a3, a3, 0xF << 2 # mask FS field
lw a3, cmp_fs_s_tbl(a3) # switch on register number
***************
*** 2957,2963 ****
and t6, t4, 0x7FFFFF # get fraction
srl t4, t4, 31 # get sign
j ra
! END(_get_cmp_s)
/*----------------------------------------------------------------------------
* get_cmp_d --
--- 2957,2963 ----
and t6, t4, 0x7FFFFF # get fraction
srl t4, t4, 31 # get sign
j ra
! END(get_cmp_s)
/*----------------------------------------------------------------------------
* get_cmp_d --
***************
*** 2978,2984 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_get_cmp_d)
srl a3, a0, 12 - 2 # get FS field (even regs only)
and a3, a3, 0xF << 2 # mask FS field
lw a3, cmp_fs_d_tbl(a3) # switch on register number
--- 2978,2984 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(get_cmp_d)
srl a3, a0, 12 - 2 # get FS field (even regs only)
and a3, a3, 0xF << 2 # mask FS field
lw a3, cmp_fs_d_tbl(a3) # switch on register number
***************
*** 3167,3173 ****
and t6, t4, 0xFFFFF # get fraction
srl t4, t4, 31 # get sign
j ra
! END(_get_cmp_d)
/*----------------------------------------------------------------------------
* set_fd_s --
--- 3167,3173 ----
and t6, t4, 0xFFFFF # get fraction
srl t4, t4, 31 # get sign
j ra
! END(get_cmp_d)
/*----------------------------------------------------------------------------
* set_fd_s --
***************
*** 3192,3203 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_set_fd_s)
sll t0, t0, 31 # position sign
sll t1, t1, 23 # position exponent
or t2, t2, t0
or t2, t2, t1
! ALEAF(_set_fd_word)
srl a3, a0, 7 - 2 # get FD field (even regs only)
and a3, a3, 0xF << 2 # mask FT field
lw a3, set_fd_s_tbl(a3) # switch on register number
--- 3192,3203 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(set_fd_s)
sll t0, t0, 31 # position sign
sll t1, t1, 23 # position exponent
or t2, t2, t0
or t2, t2, t1
! ALEAF(set_fd_word)
srl a3, a0, 7 - 2 # get FD field (even regs only)
and a3, a3, 0xF << 2 # mask FT field
lw a3, set_fd_s_tbl(a3) # switch on register number
***************
*** 3271,3277 ****
set_fd_s_f30:
mtc1 t2, $f30
j ra
! END(_set_fd_s)
/*----------------------------------------------------------------------------
* set_fd_d --
--- 3271,3277 ----
set_fd_s_f30:
mtc1 t2, $f30
j ra
! END(set_fd_s)
/*----------------------------------------------------------------------------
* set_fd_d --
***************
*** 3288,3294 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_set_fd_d)
sll t0, t0, 31 # set sign
sll t1, t1, 20 # set exponent
or t0, t0, t1
--- 3288,3294 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(set_fd_d)
sll t0, t0, 31 # set sign
sll t1, t1, 20 # set exponent
or t0, t0, t1
***************
*** 3382,3388 ****
mtc1 t3, $f30
mtc1 t0, $f31
j ra
! END(_set_fd_d)
/*----------------------------------------------------------------------------
* renorm_fs_s --
--- 3382,3388 ----
mtc1 t3, $f30
mtc1 t0, $f31
j ra
! END(set_fd_d)
/*----------------------------------------------------------------------------
* renorm_fs_s --
***************
*** 3393,3399 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_renorm_fs_s)
/*
* Find out how many leading zero bits are in t2 and put in t9.
*/
--- 3393,3399 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(renorm_fs_s)
/*
* Find out how many leading zero bits are in t2 and put in t9.
*/
***************
*** 3431,3437 ****
subu t1, t1, t9 # adjust exponent
sll t2, t2, t9
j ra
! END(_renorm_fs_s)
/*----------------------------------------------------------------------------
* renorm_fs_d --
--- 3431,3437 ----
subu t1, t1, t9 # adjust exponent
sll t2, t2, t9
j ra
! END(renorm_fs_s)
/*----------------------------------------------------------------------------
* renorm_fs_d --
***************
*** 3442,3448 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_renorm_fs_d)
/*
* Find out how many leading zero bits are in t2,t3 and put in t9.
*/
--- 3442,3448 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(renorm_fs_d)
/*
* Find out how many leading zero bits are in t2,t3 and put in t9.
*/
***************
*** 3495,3501 ****
or t2, t2, v1
sll t3, t3, t9
j ra
! END(_renorm_fs_d)
/*----------------------------------------------------------------------------
* renorm_ft_s --
--- 3495,3501 ----
or t2, t2, v1
sll t3, t3, t9
j ra
! END(renorm_fs_d)
/*----------------------------------------------------------------------------
* renorm_ft_s --
***************
*** 3506,3512 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_renorm_ft_s)
/*
* Find out how many leading zero bits are in t6 and put in t9.
*/
--- 3506,3512 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(renorm_ft_s)
/*
* Find out how many leading zero bits are in t6 and put in t9.
*/
***************
*** 3544,3550 ****
subu t5, t5, t9 # adjust exponent
sll t6, t6, t9
j ra
! END(_renorm_ft_s)
/*----------------------------------------------------------------------------
* renorm_ft_d --
--- 3544,3550 ----
subu t5, t5, t9 # adjust exponent
sll t6, t6, t9
j ra
! END(renorm_ft_s)
/*----------------------------------------------------------------------------
* renorm_ft_d --
***************
*** 3555,3561 ****
*
*----------------------------------------------------------------------------
*/
! LEAF(_renorm_ft_d)
/*
* Find out how many leading zero bits are in t6,t7 and put in t9.
*/
--- 3555,3561 ----
*
*----------------------------------------------------------------------------
*/
! LEAF(renorm_ft_d)
/*
* Find out how many leading zero bits are in t6,t7 and put in t9.
*/
***************
*** 3608,3611 ****
or t6, t6, v1
sll t7, t7, t9
j ra
! END(_renorm_ft_d)
--- 3608,3611 ----
or t6, t6, v1
sll t7, t7, t9
j ra
! END(renorm_ft_d)