> Folks...
> 
> I'm working on some FP changes, and need to know if it is possible to 
> set the FP precision in the ns32k's FP control register (similar to how 
> the precision can be set to Single, Double, or Extended on the i387 and 
> mc68881).

No.  The precsion, single/double, is specified as a suffix to the 
instruction opcodes.  Bit 8 of most FP instructions. 0 means double, 1 single.
Bit 10 of instructions that do type conversions (also bits 8,9 
for the other operand precison).  Bits are numbered from 0.

What you can set in the Floating-Point Status Register are
     Rounding mode: bits 7,8
	      00 round to nearest
	      01 round toward zero
	      10 round toward + infinity
	      11 round toward - infinity
     Underflow trap enable: bit 3 if set generate traps, if not return a result
				  of exactly zero
     Inexact result enable: bit 5 if set generate trap, if not set return
				  rounded result.
     Bits 9-15 can be set, are preserved, but not used and are returned by 
         the save FSR instruction. - for software use.
     Register Modify bit: bit 16 can be set to 0 by the load FSR instruction
				 is set to 1 when any FP register is modified. 
				 For avoiding unecessary FP reg saves on
				 context switches.

     The following are result fields that can be cleared with the Load FSR
     instruction.
     trap type: bits 0-2
     Underflow flag: bit 4
     Inexact result flag: bit 6
     
     Bits 17-31 are reserved.
> 
> If anyone can provide me with this info (including the bits in the 
> register that select the various modes) it would be greately 
> apprecaited.
> 
>          -- Jason R. Thorpe <thorpej@wasabisystems.com>

Dave F