On 20-Oct-2007 Matt Sealey wrote:
> If you need an interrupt address so very urgently, check the PCI config
> data for each device. If it's on the "ISA" bridge, you can make assumptions
> (they haven't moved!)
> 
> However, I am FAIRLY sure the device tree at least includes the interrupt
> number for these devices, can someone get me a device tree dump? Just go
> in and get the .properties of /, /openprom and /pci/isa/whatever for an
> offending example?

So.. before this discussion gets out of hand.. here is what I think we have,
and do not have in the Pegasos firmware.  My version is: Pegasos2 version 1.2
(20040810112413).  I think most of the Pegasos firmware gives me what I need to
understand the hardware, below is the one thing I currently do not understand.

Also, I have looked at the vt8231 docs, and they have all of the IO ranges for
the various legacy ISA devices listed, just as you say they do.  Frank: please
look at that document for the ISA IO locations.

PCI: I see a perfectly valid ranges tag in here.  no issues, I know exactly
where MEM and IO space are based on this.

/pci@80000000/sound@C,5 :  This is an example of one that has me slightly
confused.  You have an interrupts propery in here:
interrupts            0x3 (3)

But I highly doubt that you are using i8259 IRQ 3.  That looks like a PIN
selection to me, not an actual interrupt number.  What seems to be missing here
from my point of view, is that we do not have a map of pci dev/func -> pin ->
actual interrupt.   Most OFW machines (not all) contain such a map under a
property somewhere called interrupt-map, usually under a node for the PIC
itself.

The lack of this map is what is confusing people I think.  (It's at least, what
has me confused).  The other thing that confused me was a lack of an interrupt
node for the i8259, but again, I can live without it.

However, I can't find anywhere a map that says if you put a card in slot 2 of
the PCI, and it wants to use pin A, which interrupt on the 8259 that
corresponds to, and that is what I need.  Here is an example of what I need,
from a PReP firmware, and an example from another OFW machine:

    PCI Bridge Slot Data
      Integrated PCI device DevFunc 0x58
      Integrated PCI device DevFunc 0x60
        interrupt line(s) A routed to 8259 line(s) 15(L)
      Integrated PCI device DevFunc 0x70
        interrupt line(s) A routed to 8259 line(s) 15(L)
      Integrated PCI device DevFunc 0x80
        interrupt line(s) A routed to 8259 line(s) 15(L)
      PCI Slot 1 DevFunc 0xb0
        interrupt line(s) A/B/C/D routed to 8259 line(s) 15(L)/15(L)/15(L)/15(L)
      PCI Slot 2 DevFunc 0x90
        interrupt line(s) A/B/C/D routed to 8259 line(s) 15(L)/15(L)/15(L)/15(L)

As you can see in the above, this machine has an i8259, and all PCI interrupt
lines are routed to IRQ 15. (the above map is pretty-printed, for sanity's sake)

interrupt-map           00008000 00000000 00000000 00000000   ................
            0010:       ff97dd70 00000030 00000001 ........   ...p...0....

This one is what the interrupt map on an Apple or IBM CHRP machine looks like.
(ff97dd70 is the node id for the PIC device, and the other numbers are pin->IRQ
mappings).

Again, I haven't gotten that far yet in the code, but when I get there, that is
what I will need to know.  Everything else on the machine so far looks
decipherable to me so far, especially with the hints you have given us in the
past.

---
Tim Rightnour <root@garbled.net>
NetBSD: Free multi-architecture OS http://www.netbsd.org/
Genecys: Open Source 3D MMORPG: http://www.genecys.org/