> I think the correct fix is to make mips3_FlushICache() convert
> a0 into a K0 address with the proper cache index like
> mips3_FlushDCache().  This should avoid any TLB misses in this
> path.

> Here is the patch I had in mind.

It works fine for my NEWS5000 (R4400SC).

Thanks

Atsushi Onoe