Hi Garrett,

"Garrett D'Amore" wrote:

> Please review these diffs, and let me know if I can commit (these add
> defines for the mips revision 2 architecture, and a couple of bits in
> the Config1 CP0 register.
> 
> It also suppresses the warning when encountering a revision 2 MIPS.

When this bit of code was written, I didn't know if r2 would be by
default backwards compatible or not, since it hadn't been published at
that stage.  Since it appears that it is, then this diff looks ok.  One
comment after the diff though.

>     -- Garrett
> 
> Index: sys/arch/mips/include/mipsNN.h
> ===================================================================
> RCS file: /cvsroot/src/sys/arch/mips/include/mipsNN.h,v
> retrieving revision 1.3
> diff -u -r1.3 mipsNN.h
> --- sys/arch/mips/include/mipsNN.h      7 Feb 2003 17:38:48 -0000       1.3
> +++ sys/arch/mips/include/mipsNN.h      19 Mar 2006 21:24:47 -0000
> @@ -73,6 +73,7 @@
>  #define        MIPSNN_CFG_AR_SHIFT     10
>  
>  #define        MIPSNN_CFG_AR_REV1      0               /* Revision 1 */
> +#define        MIPSNN_CFG_AR_REV2      1               /* Revision 2 */
>  //     reserved                other values
>  
>  /* "MT" (R): MMU type implemented by processor */
> @@ -154,6 +155,12 @@
>  /* Reserved.  Write as 0, reads as 0. */
>  //     reserved                0x00000060
>  
> +/* "C2" (R): Coprocessor 2 implemented if set. */
> +#define MIPSNN_CFG1_C2         0x00000040
> +
> +/* "MD" (R): MDMX ASE implemented if set. */
> +#define MIPSNN_CFG1_MD         0x00000020
> +
>  /* "PC" (R): Performance Counters implemented if set. */
>  #define        MIPSNN_CFG1_PC          0x00000010
>  
> cvs diff: Diffing sys/arch/mips/mips
> Index: sys/arch/mips/mips/mips_machdep.c
> ===================================================================
> RCS file: /cvsroot/src/sys/arch/mips/mips/mips_machdep.c,v
> retrieving revision 1.184
> diff -u -r1.184 mips_machdep.c
> --- sys/arch/mips/mips/mips_machdep.c   24 Dec 2005 20:07:19 -0000     
> 1.184
> +++ sys/arch/mips/mips/mips_machdep.c   19 Mar 2006 21:24:47 -0000
> @@ -823,8 +823,11 @@
>                             MIPSNN_GET(CFG_AT, cfg));
>                 }
>  
> -               if (MIPSNN_GET(CFG_AR, cfg) != MIPSNN_CFG_AR_REV1)
> -                       printf("WARNING: MIPS32/64 arch revision !=
> revision 1!\n");
> +               if ((MIPSNN_GET(CFG_AR, cfg) != MIPSNN_CFG_AR_REV1) &&
> +                   (MIPSNN_GET(CFG_AR, cfg) != MIPSNN_CFG_AR_REV2))
> +                       printf("WARNING: "
> +                           "MIPS32/64 arch revision %d not known!\n",
> +                           MIPSNN_GET(CFG_AR, cfg));
>  
>                 /* figure out MMU type (and number of TLB entries) */
>                 switch (MIPSNN_GET(CFG_MT, cfg)) {

Maybe:

		switch (MIPSNN_GET(CFG_AR, cfg)) {
		case MIPSNN_CFG_AR_REV1:
		case MIPSNN_CFG_AR_REV2:
			/* OK */
			break;
		default:
			printf("WARNING: "
			    "MIPS32/64 arch revision %d not known\n",
			    MIPSNN_GET(CFG_AR, cfg));
			break;
		}

so that it's easier to add new values in the future?  Also, this could
be wrapped inside "#ifdef DEBUG" too.

Cheers,
Simon.
--
Simon Burge                            <simonb@wasabisystems.com>
NetBSD Support and Service:         http://www.wasabisystems.com/