[ moved from source-changes to port-mips ]

Izumi Tsutsui wrote:

> 
> Module Name:	src
> Committed By:	tsutsui
> Date:		Wed Nov 16 14:25:15 UTC 2005
> 
> Modified Files:
> 
> 	src/sys/arch/arc: TODO
> 
> Log Message:
> 
> Remove the following item:
> >	-   if (ipending & INT_MASK_REAL_DEV) == 0,
> >	    softnet() and softclock() are handled with all interrupt disabled.
> >		-> overblocking, possibly causes missing hardclock()
> 
> XXX: It seems some other mips ports (algor, evbmips, pmax, sgimips)
> XXX: also have the similar problem.

I believe algor, evbmips and pmax get this right.  In these ports,
cpu_intr() calls a machine-specific *_iointr(), and all these
machine-specific functions all finish with an _splset() to reenable
any processed interrupts.  Is this the problem that you meant, or
do you mean something different?

sgimips doesn't appear to do this though (and it's interrupt handling
looks possibly even more twisted and loopy than pmax!).

Simon.
--
Simon Burge                            <simonb@wasabisystems.com>
NetBSD Support and Service:         http://www.wasabisystems.com/