Doesn't the Au15xx series have built-in conventions for allowing automatic
byte ordering?.  Wasn't the PCI interface in the Au15xx series was designed
for just such an occurrence?

> -----Original Message-----
> From: Garrett D'Amore [mailto:garrett_damore@tadpole.com]
> Sent: Tuesday, October 18, 2005 9:28 AM
> To: port-mips@netbsd.org
> Subject: PCI on MIPS big-endian?
>
>
> Just out of curiousity, has anyone else ever tried running NetBSD on a
> MIPS processor in big-endian mode with a PCI bus attached?  As far as I
> can tell, all of the bus_space_XXX methods in the mips tree are busted
> for that.  Am I missing something, or am I just breaking new ground
> here?  (I do have it working, but I had to cobble up my own bus_space
> headers, and such.)
>
>     -- Garrett
>
>