Subject: RE: Figures to explain MIPS cache
To: Toru Nishimura <locore32@gaea.ocn.ne.jp>
From: Rishabh Kumar Goel <Rishabh@soc-soft.com>
List: port-mips
Date: 12/22/2003 09:57:51
Hi,

Can u also tell about tx4938 cache subsystem organization. I m in the
process of porting netbsd to this architecture. Or any link leading to
it?

-----Original Message-----
From: port-mips-owner@NetBSD.org [mailto:port-mips-owner@NetBSD.org] On
Behalf Of Toru Nishimura
Sent: Saturday, December 20, 2003 7:34 PM
To: port-mips@netbsd.org
Subject: Re: Figures to explain MIPS cache

I added 4 figures; TX4955, TX4925, TX3927 and Vr4300.

    http://www.alkyltechnology.com/files/MIPScachefigure2.pdf

Please note that while the two TX49 share the same CPU core, their
cache characteristic acutely differ each other; the former is VIPT an
the latter is "effective-PIPT."  Au1000 and IDT32438 work same as
TX4925.

Toru Nishimura/ALKYL Technology


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