Subject: Re: PCI bus 66MHz configuration
To: , <evbmips@netbsd.org>
From: Toru Nishimura <locore32@gaea.ocn.ne.jp>
List: port-mips
Date: 12/09/2003 14:51:51
Rishabh Kumar Goel asked;

> i m working on evbmips port of NetBSD. How can i configure PCI bus for 66MHz. 

It's a target hardware specific question.  Please consult hardware references.

> Should i do it in mach_init function or can i also perform the same at the 
> time of PCI-BUS scan where we detect the pci devices.(probe_bus).

Neither.   I assume here your target hardware design is similar to a conventional
PCI-enabled SoC available today.  These days such the processor has large
number of hardware registers to adjust many functional options like as knobs and
levers switch, which are sometimes called "strap options".   Every option must be
prepared appropriately for the target product parametrics *prior to* NetBSD
kernel is loaded.   That's, detailed knob/lever preparation is "ROM monitor
(BIOS in PC term) duty, not by NetBSD kernel.

However, sometimes it'd be necessary to have the system controller
("NorthBridge")  as a real device entity to control, probably as "pcih".  Please
*carefully* source codes of other NetBSD ports have similar designs to understand
what I'm trying to tell.   The rule of thumb of understanding "NetBSD way" is to
look and search the source code that does have similar design.

> Since the setting to 66Mhz involves resetting of the PCI controller. Do i have 
> to reinitializa everything(PCI controller) from the sratch.

You need to modify your ROM monitor.

Toru Nishimura/ALKYL Technology