> > Why didn't you write the two liner in a single insn?
> 
> No good reason -- my first assembly language was 6502, and it wouldn't let
> you combine the two.  I unfortunately tend to redefine problems in 6502
> context :)
> 
> Yes, it should be simply "addu a0, sp, 128" rather than the move/addu
> combination.  Thanks for pointing that out.

You hardly see MOVE op when you disassemble MIPS codes, since like as
other RISC processors the basis of MIPS insn set is 3-operand ops.   There
is no MOVE insn in fact, which would be likely "or a0,zero,sp"

Toru Nishimura/ALKYL Technology