Subject: Re: sizeof(PTE) in mipsX_subr.S
To: None <firstname.lastname@example.org>
From: None <email@example.com>
Date: 12/02/2002 17:13:22
At Tue, 3 Dec 2002 00:10:22 +0000 (UTC), "Toru Nishimura" wrote:
> > * "32-bit" NetBSD kernels should probably just punt and use 32-bit
> > entrylo regs, and
> > * "64-bit" kernels should use 64-bit PTEs.
> > However, until the latter actually exist, it might be annoying to
> > remove the ability to use 64-bit entrylo regs from the (32-bit)
> > kernel.
> 64bit PTE is necessary for specific combinations of 40bit PFN capable
Where that type of processor is the one standardized in the MIPS64
specifications. I believe mipsX_subr.S is meant to support "vanilla
r4k (mipsIII) MMU" + "mips32" + "mips64" processors, so it should be
coded to match that.
Anyway, to go back to your original messages:
Your original msg seemed to propose to change _M[TF]C0 to use m[tf]c0
unconditionally for handling of EntryLo registers.
I agree that the way the code is there now ... isn't pretty, but what
positive impact does that change make?
It would seem to make things harder if one were to want to support
wider PAs than 36 (or 38 if you got rid of the pesky additional bits
at the top of NetBSD's "PTE"s).
How is that a positive change?
Chris Demetriou Broadcom Corporation
Principal Design Engineer Broadband Processor Business Unit
Any opinions expressed in this message are mine, not necessarily Broadcom's.