Subject: Re: sizeof(PTE) in mipsX_subr.S
To: None <locore32@gaea.ocn.ne.jp>
From: None <cgd@broadcom.com>
List: port-mips
Date: 12/02/2002 10:40:28
At Sun, 1 Dec 2002 13:19:05 +0000 (UTC), "Toru Nishimura" wrote:
> mipsX_subr.S contains _MFC0/_MTC0 mnemonics to handle EntryLo[0|1]
> registers.  Because standard MIPS 36bit physical address is compactly
> stored inside 32bit EntryLo[0|1] registers, it makes little sense to use 64bit
> CP0 instruction for them as long as we will not venture the extended potential
> of R1x000 processors.  I think rather better to keep PTE in 32bit size and
> change mipsX_subr.S so-so. Comments?

As Paul K. noted, the MIPS64 architecture makes wider physical
addresses fairly well defined.

NetBSD already runs on one processor whose PA size is 40 bits, and
these extra bits might be useful for setting up virtual mappings of
... all sorts of stuff if wired entries aren't desired.


*** HOWEVER *** eventually, I think the answer is:

* "32-bit" NetBSD kernels should probably just punt and use 32-bit
  entrylo regs, and

* "64-bit" kernels should use 64-bit PTEs.

However, until the latter actually exist, it might be annoying to
remove the ability to use 64-bit entrylo regs from the (32-bit)
kernel.



cgd