Subject: sizeof(PTE) in mipsX_subr.S
To: None <port-mips@netbsd.org>
From: Toru Nishimura <locore32@gaea.ocn.ne.jp>
List: port-mips
Date: 12/01/2002 22:19:14
Folks,

mipsX_subr.S contains _MFC0/_MTC0 mnemonics to handle EntryLo[0|1]
registers.  Because standard MIPS 36bit physical address is compactly
stored inside 32bit EntryLo[0|1] registers, it makes little sense to use 64bit
CP0 instruction for them as long as we will not venture the extended potential
of R1x000 processors.  I think rather better to keep PTE in 32bit size and
change mipsX_subr.S so-so. Comments?

Toru Nishimura/ALKYL Technology