Subject: Re: Accelerating memset/memcpy
To: Paul Koning <pkoning@equallogic.com>
From: Nigel Stephens <nigel@mips.com>
List: port-mips
Date: 10/01/2002 16:58:50 
Nigel Stephens wrote:

> In MIPS32 and MIPS64 compliant processors the "pref" instruction with 
> code 30 is defined as "prepare for store" with the following description:


Oh, and I've just checked: the "pref 30" opcode is also implemented on 
the PMC-Sierra RM7000, although sadly not on the RM52xx, apparently.

Nigel