port-mips: MIPS 20Kc cache

Subject: MIPS 20Kc cache
To: None <port-mips@netbsd.org>
From: Toru Nishimura <locore32@gaea.ocn.ne.jp>
List: port-mips
Date: 08/19/2002 20:35:47

Folks,

MIPS 20Kc defines the cache architecture radically differently from
standard R4000 derivatives.  Could someone out there enlighten me the
rationale behind the changes?  Pointers to info-sources are welcome.

Toru Nishimura/ALKYL Technology