Subject: Re: N32 patch proposal 2.0
To: Toru Nishimura <locore32@gaea.ocn.ne.jp>
From: Emmanuel Dreyfus <manu@netbsd.org>
List: port-mips
Date: 01/06/2002 09:00:29
Toru Nishimura <locore32@gaea.ocn.ne.jp> wrote:
> OK, I put my objection here telling having "N32 emulation" in
> NetBSD/mips is a mistake.  It's "N32 disguise."  IRIX never
> implemented it in such the way.  

Again: This patch does not pretend to implement N32 support. It just
introduces a setregs_n32 function that I need for committing work on
o32/n32 binaries matching in COMPAT_IRIX. It will certainly be used in
N32 support later, but it's not done yet.

Of course, real N32 support will come when we'll have a working LP64
kernel.

> And _please_, think seriously how
> we exploit 64bit power of MIPS processors, rather than continuing to
> morphing (spoiling?) NetBSD/mips>.

I had the feeling I was just doing this, trying to build a 64 bits MIPS
kernel. And what spoiling are you talking about? I've committed nothing
related to N32/LP64 yet! 

Could you please be more precise about what is wrong for you in this
patch? It seems that the consensus is that N32/LP64 stuff will live in
sys/arch/mips, with appropriate ifdefs, hence it seems to me that this
setregs_n32 is in the right place. Later, we'll probably ifdef it with a
LP64 conditionnal or something like this.

So what's wrong? Where do you want setregs_n32 to go?

-- 
Emmanuel Dreyfus
manu@netbsd.org