Subject: Re: Support for atomic locks in lock.h
To: Toru Nishimura <locore32@gaea.ocn.ne.jp>
From: Anders Dinsen <anders@dinsen.net>
List: port-mips
Date: 12/16/2001 13:18:54
On Thu, 29 Nov 2001, Toru Nishimura wrote:
> As side note, there is LL/SC-less post-R3K MIPS processor
> besides of Vr4100 and the number of such beasts might grow.
> I can't figure out the reason to remove it since modern MIPS
> processors are expected to use for embeded products of
> "pretty light-weight multi-threading" systems...

Yes, it's strange. And take NEC's Markham and Korva network processors
(Vr4100+ethernet+system control+ATM+USB on a single chip): they happily
incorporate a 64 bit CPU, but allows a max 32 MB RAM! And a 4 MB memory
window only on the PCI :-( I'd rather have a MIPS R3K PLUS LL/SC
instructions than the Vr4100 core on that chip.

-- 
Anders Dinsen
anders@dinsen.net
http://dinsen.net/anders/