Shuichiro URATA <ur@a-r.org> mentioned to how many ops are required for
MIPS3 TLB miss handler;

>> Module Name:	syssrc
>> Committed By:	jeffs
>> Date:		Wed Sep  6 06:33:42 UTC 2000
>> 
>> Modified Files:
>> 	syssrc/sys/arch/mips/mips: locore_mips3.S
>> 
>> Log Message:
>> Remove 3 of the nops between tlbwr and eret in tlb miss handlers.  They
>> were added early when adding the QED support.  RM5231 seems to work fine
>> w/o the extra nops.  Noticed by Chuck Cranor.
> 
> This breaks R4000/4400 case.
> R4000/4400 needs at least 3 nops between tlbwr and eret.
> 
> ---
> Shuichiro URATA
> ur@a-r.org

"See MIPS run" pp400-401, Appendix A -- Instruction Timing and
Optimization, explains this exact case in detail.  Ours seems to have
excess nops.

Tohru Nishimura