>    one of the groups here is looking at supporting the IDT MIPS_RC32364 
> core. (c.f. http://www.idt.com/products/pages/Processors-79RC32364.html)
> the 32364 has a R4000'ish MMU, except that it doesn't support 64 bit
> instructions.   specifically, the differences are:
>
> - the "Context", "BadVaddr", and "EntryHi" registers are all 32 bits
>        on the 32364 (rather than 64 bits as on the R4000)
> - the 32364 does not have an "XContext" register
> - 64-bit instructions such as "ld" and "dmfc0" are not implemented on
>        the 32364
>
> the question is what to do with locore_mips3.S.  clearly, the non-standard 
> use of "XContext" isn't going to work on the 32364.   also, all the 
> 64 bit instructions (e.g. dmtc0/dmfc0/ld) are going to have to go away
>
>     ...
>
> possible plans of action include:
>
> - get rid of the non-standard XContext usage, and use self modifying 
>   code to downgrade the dmtc0/dmfc0 instructions to mtc0/mfc0 (run time)

I'd take the path to get rid of abused XContext register.  Explicit
usage of 64bit DMTC/DMFC insn and other can be reducted into 32bit
counter parts.  I'm uncertain the advantage of "performance and
efficiency" of such 64bit insns given 32bit OS nature of NetBSD/mips.

Tohru Nishimura