On Wed, Apr 19, 2000 at 08:58:32PM +0900, Toru Nishimura wrote:

 > One comment I can make; on page 211, the auther says;
 > 
 >    NEC ommited ll/sc instructions from its core from Vr4100 CPU, probably
 >    unaware that uniprocessors can benefit from these instruction too. 
 > 
 > He guessed correctly.  I happen to know some of NEC semiconductor
 > guys, and they sometimes unaware of what MIPS processor design is
 > trying to solve, particularly in the area of how operating system
 > would utilize the processor design.

Well, that really sucks!  How does WinCE implement locking primitives
for its thread library on those CPUs?

-- 
        -- Jason R. Thorpe <thorpej@zembu.com>