Subject: Re: propose fix Vr4100 page mask lossage
To: None <nisimura@itc.aist-nara.ac.jp>
From: Toru Nishimura <nisimura@itc.aist-nara.ac.jp>
List: port-mips
Date: 04/18/2000 11:15:58 
And PLS change as mips3_cpu_resume() around entry1set: as;

entry1set:
        li      s0, 1
        mtc0    s0, MIPS_COP_0_TLB_INDEX        # TLB entry #1
        or      a2, MIPS3_PG_G
        dmtc0   a2, MIPS_COP_0_TLB_LO0          # lo0: upte[1] | PG_G
        li      a2, MIPS3_PG_G
        dmtc0   a2, MIPS_COP_0_TLB_LO1          # lo1: none | PG_G

-nisimura