At Sat, 15 Apr 2000 11:29:26 +0900 (JST),
nisimura@itc.aist-nara.ac.jp (Toru Nishimura) wrote:
> When MIPS started designing FPA, transistor was scarse resource.  Some
> _implementation_ of R2000 (R3000?) processors lacked some portion of FP
> insns, so they should be emulated by operating system software.  The
> _degrees_ of hardware implemented FP insn completeness _varied_ from
> one implementation to another.  So, all of FPA insns should be emulated
> by kernel software anyway.  MIPS started FP insn definition w/o
> hardware implementation, then gradually added FP hardware.  That's the
> reason why fp.S was made, and the exact reason why IDT, TOSHIBA/PHILIPS
> or NEC could safely eliminate FPA hardware from their own variations
> later; if FP insns is necessary to run, FPA emulation by kernel is
> (was) pre-requisite, and there was no lossage from kernel software's
> point of view.

Please separate two things.
CPx is optional on MIPS architecture, but current kernel(without SOFTFLOAT,
NOFPU) depends on CP1 existence right now. Lacking some CP1 instructions may
be OK, but CP1 registers are mandatory.

Original my patch(+PR kern/9016) intended to do:

1 Original fp.S was incomplete. So I added more CP1 instructions enough to
  run existing userlands current gcc generates. It's still lacks some CP1
  instructions.
2 Eliminate CP1 register dependency.

I think determing whether CP1 registers exist or not may have additional
runtime overhead.

Anyway, current fp.S is very ugly, It needs completely rewritten.

Thanks,
---
Shuichiro URATA
ur@a-r.org