Toru Nishimura wrote:
> 
> How many nop's are required given most 'hazardous' CP0 MIPS processors
> to make the following work correctly?

That code looks correct.  QED in the 52xx manual has done a good
job of documenting things.  I recall the MIPS R4x00 manuals were not
specific about this but it may be covered in the errata.

The hpcmips web page does a good job at pointing to various docs.  We
should add the QED (www.qedinc.com) links to the cobalt page, and
the MIPS man pages to pmax and whatever else is appropriate.

jeffs