Subject: Re: CVS commit: syssrc
To: Noriyuki Soda <soda@sra.co.jp>
From: Warner Losh <imp@village.org>
List: port-mips
Date: 03/05/2000 12:20:05
In message <200003051552.AAA06527@srapc342.sra.co.jp> Noriyuki Soda writes:
: > > SC bit (MIPS3_CONFIG_SC) is bit 17, and read-only.
: > 
: > Some members of the arc family have a level 2 cache, while others
: > don't.  It would be unwise to assmue a value for this bit.
: 
: Do you know a platform that this bit cannot be used for secondary
: cache related operation in locore?
:
: As far as I've heard, NEC RISCserver 2200 and NEC RISCstation 2250
: have correct value (SC==1) about this bit.
: 
: My machine (derived from MIPS Magnum) doesn't have secondary cache,
: and has correct value (SC==0), too.

I misunderstood what you wanted to do.  I had thought you were wanting 
to assume that SC==1 always on the arc port, rather than reading it
from SC.

Warner