Noriyuki Soda <soda@sra.co.jp> writes:
> Software is responsible for configuration of MIPS3_CONFIG_SC bit
> (secondary cache enable). And "#ifdef pmax" of the mips_machdep.c
> seems to indicate that R4000 pmax's firemware doesn't initialize this
> bit. Is this right?

No.

"MIPS R4000 User's Manual" clearly states that;

	Some configuration options, as defined by Config bits 31:6, are
	set by the hardware during reset and are included in the Config
	register as read-only status bits for the software to access.

SC bit (MIPS3_CONFIG_SC) is bit 17, and read-only.

Takao Shinohara